If any of the sign extended bits are demanded, the input sign bit is demanded

for a sign extension.

This fixes InstCombine/2006-02-13-DemandedMiscompile.ll and Ptrdist/bc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26152 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index 4247d8a6e295606fa58fdd389545e86b71289ff3..d42e0bbdf91e73aaab9d0fad09d1c7a92711fb45 100644 (file)
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -889,15 +889,21 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, uint64_t DemandedMask,
       KnownZero |= NewBits;
     } else {
       // Sign extension.
-      if (SimplifyDemandedBits(I->getOperand(0),
-                               DemandedMask & SrcTy->getIntegralTypeMask(),
+      uint64_t InSignBit = 1ULL << (SrcTy->getPrimitiveSizeInBits()-1);
+      int64_t InputDemandedBits = DemandedMask & SrcTy->getIntegralTypeMask();
+
+      // If any of the sign extended bits are demanded, we know that the sign
+      // bit is demanded.
+      if (NewBits & DemandedMask)
+        InputDemandedBits |= InSignBit;
+      
+      if (SimplifyDemandedBits(I->getOperand(0), InputDemandedBits,
                                KnownZero, KnownOne, Depth+1))
         return true;
       assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 
       
       // If the sign bit of the input is known set or clear, then we know the
       // top bits of the result.
-      uint64_t InSignBit = 1ULL << (SrcTy->getPrimitiveSizeInBits()-1);
 
       // If the input sign bit is known zero, or if the NewBits are not demanded
       // convert this into a zero extension.