ARM: Stingray: Decrease i2c.0 and i2c.3 drive strength.
authorJay Cheng <jacheng@nvidia.com>
Fri, 26 Nov 2010 17:05:43 +0000 (12:05 -0500)
committerTodd Poynor <toddpoynor@google.com>
Tue, 30 Nov 2010 23:31:16 +0000 (15:31 -0800)
Change-Id: I9c629d213e451e23ea2a5b3874462d37dddbe282
Signed-off-by: Ken Radtke <kradtke@nvidia.com>
arch/arm/mach-tegra/board-stingray-pinmux.c [changed mode: 0644->0755]

old mode 100644 (file)
new mode 100755 (executable)
index d3437bf..3d8c33c
@@ -143,7 +143,7 @@ static __initdata struct tegra_pingroup_config stingray_pinmux[] = {
 };
 
 static __initdata struct tegra_drive_pingroup_config stingray_drive_pinmux[] = {
-       {TEGRA_DRIVE_PINGROUP_AO1,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_AO1,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_2, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
        {TEGRA_DRIVE_PINGROUP_AO2,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
        {TEGRA_DRIVE_PINGROUP_AT1,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
        {TEGRA_DRIVE_PINGROUP_AT2,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
@@ -154,7 +154,7 @@ static __initdata struct tegra_drive_pingroup_config stingray_drive_pinmux[] = {
        {TEGRA_DRIVE_PINGROUP_DAP2,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_8, TEGRA_PULL_0,  TEGRA_PULL_0,  TEGRA_SLEW_FASTEST, TEGRA_SLEW_FASTEST},
        {TEGRA_DRIVE_PINGROUP_DAP3,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_8, TEGRA_PULL_0,  TEGRA_PULL_0,  TEGRA_SLEW_FASTEST, TEGRA_SLEW_FASTEST},
        {TEGRA_DRIVE_PINGROUP_DAP4,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
-       {TEGRA_DRIVE_PINGROUP_DBG,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+       {TEGRA_DRIVE_PINGROUP_DBG,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_2, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
        {TEGRA_DRIVE_PINGROUP_LCD1,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
        {TEGRA_DRIVE_PINGROUP_LCD2,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
        {TEGRA_DRIVE_PINGROUP_SDMMC2,  TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},