};
static __initdata struct tegra_drive_pingroup_config stingray_drive_pinmux[] = {
- {TEGRA_DRIVE_PINGROUP_AO1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+ {TEGRA_DRIVE_PINGROUP_AO1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_2, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_AO2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_AT1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_AT2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_DAP2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_8, TEGRA_PULL_0, TEGRA_PULL_0, TEGRA_SLEW_FASTEST, TEGRA_SLEW_FASTEST},
{TEGRA_DRIVE_PINGROUP_DAP3, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_8, TEGRA_PULL_0, TEGRA_PULL_0, TEGRA_SLEW_FASTEST, TEGRA_SLEW_FASTEST},
{TEGRA_DRIVE_PINGROUP_DAP4, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
- {TEGRA_DRIVE_PINGROUP_DBG, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
+ {TEGRA_DRIVE_PINGROUP_DBG, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_2, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_LCD1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_LCD2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_SDMMC2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},