add assembler support for the cvtsd2sil/cvtsd2siq mnemonics, rdar://8456382

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115027 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 6c152bb16ebafe45ba6e43e4eb6bee2256f3e150..a34360f4f597d14a6a6d697e2bb8b1e95e428422 100644 (file)
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -652,9 +652,9 @@ defm Int_CVTSS2SI : sse12_cvt_sint<0x2D, VR128, GR32, int_x86_sse_cvtss2si,
 defm Int_CVTSS2SI64 : sse12_cvt_sint<0x2D, VR128, GR64, int_x86_sse_cvtss2si64,
                       f32mem, load, "cvtss2si{q}">, XS, REX_W;
 defm CVTSD2SI : sse12_cvt_sint<0x2D, VR128, GR32, int_x86_sse2_cvtsd2si,
-                f128mem, load, "cvtsd2si">, XD;
+                f128mem, load, "cvtsd2si{l}">, XD;
 defm CVTSD2SI64 : sse12_cvt_sint<0x2D, VR128, GR64, int_x86_sse2_cvtsd2si64,
-                  f128mem, load, "cvtsd2si">, XD, REX_W;
+                  f128mem, load, "cvtsd2si{q}">, XD, REX_W;
 
 
 let isAsmParserOnly = 1 in {

diff --git a/test/MC/AsmParser/X86/x86_instructions.s b/test/MC/AsmParser/X86/x86_instructions.s
index 24f5a27ef6d7efafe045f08f9f37508fbd42d0cc..19702ce5b04d4a2a475f6c505a876b609c4d366a 100644 (file)
--- a/test/MC/AsmParser/X86/x86_instructions.s
+++ b/test/MC/AsmParser/X86/x86_instructions.s
@@ -419,12 +419,17 @@ fstsw (%rax)
 
 // rdar://8456382 - cvtsd2si support.
 cvtsd2si       %xmm1, %rax
-// CHECK: cvtsd2si     %xmm1, %rax
+// CHECK: cvtsd2siq    %xmm1, %rax
 // CHECK: encoding: [0xf2,0x48,0x0f,0x2d,0xc1]
 cvtsd2si       %xmm1, %eax
-// CHECK: cvtsd2si     %xmm1, %eax
+// CHECK: cvtsd2sil    %xmm1, %eax
 // CHECK: encoding: [0xf2,0x0f,0x2d,0xc1]
 
+cvtsd2siq %xmm0, %rax // CHECK: cvtsd2siq      %xmm0, %rax
+cvtsd2sil %xmm0, %eax // CHECK: cvtsd2sil      %xmm0, %eax
+cvtsd2si %xmm0, %rax  // CHECK: cvtsd2siq      %xmm0, %rax
+
+
 cvttpd2dq %xmm1, %xmm0  // CHECK: cvttpd2dq %xmm1, %xmm0
 cvttpd2dq (%rax), %xmm0 // CHECK: cvttpd2dq (%rax), %xmm0