clk_prepare_enable(clk->isp);
clk_prepare_enable(clk->isp_jpe);
clk_prepare_enable(clk->clk_mipi_24m);
+ clk_prepare_enable(clk->pclkin_isp);
+
+
// clk_enable(clk->pd_isp);
// clk_enable(clk->aclk_isp);
clk_disable_unprepare(clk->isp);
clk_disable_unprepare(clk->isp_jpe);
clk_disable_unprepare(clk->clk_mipi_24m);
+ clk_disable_unprepare(clk->pclkin_isp);
// clk_disable(clk->pd_isp);
// clk_disable(clk->aclk_isp);
mrv_clk->cif_clk_out = devm_clk_get(&pdev->dev, "clk_vipout");
mrv_clk->clk_mipi_24m = devm_clk_get(&pdev->dev,"clk_mipi_24m");
if (/*IS_ERR_OR_NULL(mrv_clk->pd_isp) ||*/ IS_ERR_OR_NULL(mrv_clk->aclk_isp) || IS_ERR_OR_NULL(mrv_clk->hclk_isp) ||
- IS_ERR_OR_NULL(mrv_clk->isp) || IS_ERR_OR_NULL(mrv_clk->isp_jpe) /*|| IS_ERR_OR_NULL(mrv_clk->pclkin_isp)*/ ||
+ IS_ERR_OR_NULL(mrv_clk->isp) || IS_ERR_OR_NULL(mrv_clk->isp_jpe) || IS_ERR_OR_NULL(mrv_clk->pclkin_isp) ||
IS_ERR_OR_NULL(mrv_clk->cif_clk_out) || IS_ERR_OR_NULL(mrv_clk->clk_mipi_24m)) {
camsys_err("Get %s clock resouce failed!\n",miscdev_name);
err = -EINVAL;