add spi dts demo code for rk3288
authorluowei <lw@rock-chips.com>
Tue, 25 Mar 2014 03:34:53 +0000 (11:34 +0800)
committerluowei <lw@rock-chips.com>
Tue, 25 Mar 2014 03:35:31 +0000 (11:35 +0800)
arch/arm/boot/dts/rk3188-tb.dts
arch/arm/boot/dts/rk3288-tb.dts
arch/arm/configs/rockchip_defconfig
drivers/spi/spi-rockchip-test.c
drivers/spi/spi-rockchip.c

index 1f3b93a14ad8a29527548c702b293e7ad50aad1e..6d83a86e4708eeadf21170731471760571eb376c 100755 (executable)
 
 &spi0 {
        status = "okay";
-       max-freq = <24000000>;  
+       max-freq = <48000000>;  
        /*
        spi_test@00 {
                compatible = "rockchip,spi_test_bus0_cs0";
                 reg = <0>;
-                spi-max-frequency = <12000000>;
+                spi-max-frequency = <24000000>;
                 poll_mode = <0>;
                type = <0>;
                enable_dma = <0>;
        spi_test@01 {
                compatible = "rockchip,spi_test_bus0_cs1";
                reg = <1>;
-               spi-max-frequency = <12000000>;
+               spi-max-frequency = <24000000>;
                poll_mode = <0>;
                type = <0>;
-               enable_dma = <0>;               
+               enable_dma = <0>;
        };
        */
 };
 
 &spi1 {
        status = "okay";
-       max-freq = <24000000>;
+       max-freq = <48000000>;
        /*
        spi_test@10 {
                compatible = "rockchip,spi_test_bus1_cs0";
                reg = <0>;
-               spi-max-frequency = <12000000>;
+               spi-max-frequency = <24000000>;
                poll_mode = <0>;
                type = <0>;
                enable_dma = <0>;
        spi_test@11 {
                compatible = "rockchip,spi_test_bus1_cs1";
                reg = <1>;
-               spi-max-frequency = <12000000>;
+               spi-max-frequency = <24000000>;
                poll_mode = <0>;
                type = <0>;
                enable_dma = <0>;
index 2f3450076a57e1025115cb55d81ca7e4dad72bc4..71dccf0373eafecf62d23dce8e900d7afe47f046 100755 (executable)
 
 &spi0 {
        status = "okay";
+       max-freq = <48000000>;  
+       /*
+       spi_test@00 {
+               compatible = "rockchip,spi_test_bus0_cs0";
+                reg = <0>;
+                spi-max-frequency = <24000000>;
+                poll_mode = <0>;
+               type = <0>;
+               enable_dma = <0>;
+
+       };
+
+       spi_test@01 {
+               compatible = "rockchip,spi_test_bus0_cs1";
+               reg = <1>;
+               spi-max-frequency = <24000000>;
+               poll_mode = <0>;
+               type = <0>;
+               enable_dma = <0>;               
+       };
+       */
 };
 
 &spi1 {
        status = "okay";
+       max-freq = <48000000>;
+       /*
+       spi_test@10 {
+               compatible = "rockchip,spi_test_bus1_cs0";
+               reg = <0>;
+               spi-max-frequency = <24000000>;
+               poll_mode = <0>;
+               type = <0>;
+               enable_dma = <0>;
+       };
+
+       spi_test@11 {
+               compatible = "rockchip,spi_test_bus1_cs1";
+               reg = <1>;
+               spi-max-frequency = <24000000>;
+               poll_mode = <0>;
+               type = <0>;
+               enable_dma = <0>;
+       };
+       */
 };
 
 &spi2 {
        status = "okay";
+       max-freq = <48000000>;
+       /*
+       spi_test@20 {
+               compatible = "rockchip,spi_test_bus2_cs0";
+               reg = <0>;
+               spi-max-frequency = <24000000>;
+               poll_mode = <0>;
+               type = <0>;
+               enable_dma = <0>;
+       };
+
+       spi_test@21 {
+               compatible = "rockchip,spi_test_bus2_cs1";
+               reg = <1>;
+               spi-max-frequency = <24000000>;
+               poll_mode = <0>;
+               type = <0>;
+               enable_dma = <0>;
+       };
+       */
 };
 
 &i2c0 {
index 5a16bd5f25d0965df7cd11deefdf2df638a9d44b..60d0f8eb4bb94b048002280be60e61ef966ec376 100644 (file)
@@ -315,6 +315,8 @@ CONFIG_I2C_ROCKCHIP_COMPAT=y
 CONFIG_SPI=y
 CONFIG_SPI_ROCKCHIP_CORE=y
 CONFIG_SPI_ROCKCHIP=y
+CONFIG_SPI_ROCKCHIP_DMA=y
+CONFIG_SPI_ROCKCHIP_TEST=y
 CONFIG_DEBUG_GPIO=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_BATTERY_BQ24296=y
index b4c5321ec5eecae15be9ddf129751e555096ece9..562b86dc8583d4391608ed2ca5b7c9d68da71ff3 100755 (executable)
@@ -54,7 +54,7 @@ static ssize_t spi_test_write(struct file *file,
        struct spi_device *spi = NULL;\r
        char txbuf[256],rxbuf[256];\r
 \r
-       printk("%s:0:bus=0,cs=0; 1:bus=0,cs=1; 2:bus=1,cs=0; 3:bus=1,cs=1\n",__func__);\r
+       printk("%s:0:bus=0,cs=0; 1:bus=0,cs=1; 2:bus=1,cs=0; 3:bus=1,cs=1; 4:bus=2,cs=0; 5:bus=2,cs=1\n",__func__);\r
 \r
        if(count > 5)\r
            return -EFAULT;\r
@@ -67,7 +67,7 @@ static ssize_t spi_test_write(struct file *file,
        if(nr >= 6 || nr < 0)\r
        {\r
                printk("%s:cmd is error\n",__func__);\r
-           return -EFAULT;\r
+               return -EFAULT;\r
        }\r
        \r
        for(i=0; i<256; i++)\r
@@ -223,6 +223,8 @@ static const struct of_device_id rockchip_spi_test_dt_match[] = {
        { .compatible = "rockchip,spi_test_bus0_cs1", },\r
        { .compatible = "rockchip,spi_test_bus1_cs0", },\r
        { .compatible = "rockchip,spi_test_bus1_cs1", },\r
+       { .compatible = "rockchip,spi_test_bus2_cs0", },\r
+        { .compatible = "rockchip,spi_test_bus2_cs1", },\r
        {},\r
 };\r
 MODULE_DEVICE_TABLE(of, rockchip_spi_test_dt_match);\r
index 38aa5d2fe5db9b84e610a22f65d143322ddc776d..cb3b51ba5c9919caca4c08122ffed5e1353045d7 100755 (executable)
@@ -221,7 +221,7 @@ static int rockchip_spi_probe(struct platform_device *pdev)
 #ifdef CONFIG_SPI_ROCKCHIP_DMA
        ret = dw_spi_dma_init(dws);
        if (ret)
-               goto err_release_mem;
+       printk("%s:fail to init dma\n",__func__);
 #endif
 
        ret = dw_spi_add_host(dws);