&spi0 {
status = "okay";
- max-freq = <24000000>;
+ max-freq = <48000000>;
/*
spi_test@00 {
compatible = "rockchip,spi_test_bus0_cs0";
reg = <0>;
- spi-max-frequency = <12000000>;
+ spi-max-frequency = <24000000>;
poll_mode = <0>;
type = <0>;
enable_dma = <0>;
spi_test@01 {
compatible = "rockchip,spi_test_bus0_cs1";
reg = <1>;
- spi-max-frequency = <12000000>;
+ spi-max-frequency = <24000000>;
poll_mode = <0>;
type = <0>;
- enable_dma = <0>;
+ enable_dma = <0>;
};
*/
};
&spi1 {
status = "okay";
- max-freq = <24000000>;
+ max-freq = <48000000>;
/*
spi_test@10 {
compatible = "rockchip,spi_test_bus1_cs0";
reg = <0>;
- spi-max-frequency = <12000000>;
+ spi-max-frequency = <24000000>;
poll_mode = <0>;
type = <0>;
enable_dma = <0>;
spi_test@11 {
compatible = "rockchip,spi_test_bus1_cs1";
reg = <1>;
- spi-max-frequency = <12000000>;
+ spi-max-frequency = <24000000>;
poll_mode = <0>;
type = <0>;
enable_dma = <0>;
&spi0 {
status = "okay";
+ max-freq = <48000000>;
+ /*
+ spi_test@00 {
+ compatible = "rockchip,spi_test_bus0_cs0";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ poll_mode = <0>;
+ type = <0>;
+ enable_dma = <0>;
+
+ };
+
+ spi_test@01 {
+ compatible = "rockchip,spi_test_bus0_cs1";
+ reg = <1>;
+ spi-max-frequency = <24000000>;
+ poll_mode = <0>;
+ type = <0>;
+ enable_dma = <0>;
+ };
+ */
};
&spi1 {
status = "okay";
+ max-freq = <48000000>;
+ /*
+ spi_test@10 {
+ compatible = "rockchip,spi_test_bus1_cs0";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ poll_mode = <0>;
+ type = <0>;
+ enable_dma = <0>;
+ };
+
+ spi_test@11 {
+ compatible = "rockchip,spi_test_bus1_cs1";
+ reg = <1>;
+ spi-max-frequency = <24000000>;
+ poll_mode = <0>;
+ type = <0>;
+ enable_dma = <0>;
+ };
+ */
};
&spi2 {
status = "okay";
+ max-freq = <48000000>;
+ /*
+ spi_test@20 {
+ compatible = "rockchip,spi_test_bus2_cs0";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ poll_mode = <0>;
+ type = <0>;
+ enable_dma = <0>;
+ };
+
+ spi_test@21 {
+ compatible = "rockchip,spi_test_bus2_cs1";
+ reg = <1>;
+ spi-max-frequency = <24000000>;
+ poll_mode = <0>;
+ type = <0>;
+ enable_dma = <0>;
+ };
+ */
};
&i2c0 {
CONFIG_SPI=y
CONFIG_SPI_ROCKCHIP_CORE=y
CONFIG_SPI_ROCKCHIP=y
+CONFIG_SPI_ROCKCHIP_DMA=y
+CONFIG_SPI_ROCKCHIP_TEST=y
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_BATTERY_BQ24296=y
struct spi_device *spi = NULL;\r
char txbuf[256],rxbuf[256];\r
\r
- printk("%s:0:bus=0,cs=0; 1:bus=0,cs=1; 2:bus=1,cs=0; 3:bus=1,cs=1\n",__func__);\r
+ printk("%s:0:bus=0,cs=0; 1:bus=0,cs=1; 2:bus=1,cs=0; 3:bus=1,cs=1; 4:bus=2,cs=0; 5:bus=2,cs=1\n",__func__);\r
\r
if(count > 5)\r
return -EFAULT;\r
if(nr >= 6 || nr < 0)\r
{\r
printk("%s:cmd is error\n",__func__);\r
- return -EFAULT;\r
+ return -EFAULT;\r
}\r
\r
for(i=0; i<256; i++)\r
{ .compatible = "rockchip,spi_test_bus0_cs1", },\r
{ .compatible = "rockchip,spi_test_bus1_cs0", },\r
{ .compatible = "rockchip,spi_test_bus1_cs1", },\r
+ { .compatible = "rockchip,spi_test_bus2_cs0", },\r
+ { .compatible = "rockchip,spi_test_bus2_cs1", },\r
{},\r
};\r
MODULE_DEVICE_TABLE(of, rockchip_spi_test_dt_match);\r
#ifdef CONFIG_SPI_ROCKCHIP_DMA
ret = dw_spi_dma_init(dws);
if (ret)
- goto err_release_mem;
+ printk("%s:fail to init dma\n",__func__);
#endif
ret = dw_spi_add_host(dws);