cvtsd2ss / cvtss2sd encoding bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26193 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index be4b983efc78dce628ce09cbb0eb50a12ffc2d81..85aa669ae0c789514a9578d9a5a6151932ca7bc6 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -2423,19 +2423,19 @@ def CVTTSD2SIrm: I<0x2C, MRMSrcMem, (ops R32:$dst, f64mem:$src),
 def CVTSS2SDrr: I<0x5A, MRMSrcReg, (ops FR64:$dst, FR32:$src),
                   "cvtss2sd {$src, $dst|$dst, $src}",
                   [(set FR64:$dst, (fextend FR32:$src))]>,
-                Requires<[HasSSE2]>, XD;
+                Requires<[HasSSE2]>, XS;
 def CVTSS2SDrm: I<0x5A, MRMSrcMem, (ops FR64:$dst, f32mem:$src),
                   "cvtss2sd {$src, $dst|$dst, $src}",
                   [(set FR64:$dst, (fextend (loadf32 addr:$src)))]>,
-                Requires<[HasSSE2]>, XD;
+                Requires<[HasSSE2]>, XS;
 def CVTSD2SSrr: I<0x5A, MRMSrcReg, (ops FR32:$dst, FR64:$src),
                   "cvtsd2ss {$src, $dst|$dst, $src}",
                   [(set FR32:$dst, (fround FR64:$src))]>,
-                Requires<[HasSSE2]>, XS;
+                Requires<[HasSSE2]>, XD;
 def CVTSD2SSrm: I<0x5A, MRMSrcMem, (ops FR32:$dst, f64mem:$src), 
                   "cvtsd2ss {$src, $dst|$dst, $src}",
                   [(set FR32:$dst, (fround (loadf64 addr:$src)))]>,
-                Requires<[HasSSE2]>, XS;
+                Requires<[HasSSE2]>, XD;
 def CVTSI2SSrr: I<0x2A, MRMSrcReg, (ops FR32:$dst, R32:$src),
                   "cvtsi2ss {$src, $dst|$dst, $src}",
                   [(set FR32:$dst, (sint_to_fp R32:$src))]>,