Set register class of a register according to value of HasMips64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140570 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 6ad77242402a263c7ad899ddc9d6744da049cd61..4578d224b67bbf8edcb48584b17207a16b0792ef 100644 (file)
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -2268,7 +2268,7 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain,
       else if (RegVT == MVT::f32)
         RC = Mips::FGR32RegisterClass;
       else if (RegVT == MVT::f64)
-        RC = Mips::AFGR64RegisterClass;
+        RC = HasMips64 ? Mips::FGR64RegisterClass : Mips::AFGR64RegisterClass;
       else
         llvm_unreachable("RegVT not supported by FormalArguments Lowering");