Ugh. Only meant to do this in thumb mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33780 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp
index 9c9aef75990cc410b9874b056dfdbce683e28f75..94c10f1e3b003863bfe1208c086c3807e770b547 100644 (file)
--- a/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -1159,12 +1159,17 @@ void ARMRegisterInfo::emitEpilogue(MachineFunction &MF,
   }
 
   if (VARegSaveSize) {
-    // Epilogue for vararg functions: pop LR to R3 and branch off it.
-    // FIXME: Verify this is still ok when R3 is no longer being reserved.
-    BuildMI(MBB, MBBI, TII.get(ARM::tPOP)).addReg(ARM::R3);
+    if (isThumb)
+      // Epilogue for vararg functions: pop LR to R3 and branch off it.
+      // FIXME: Verify this is still ok when R3 is no longer being reserved.
+      BuildMI(MBB, MBBI, TII.get(ARM::tPOP)).addReg(ARM::R3);
+
     emitSPUpdate(MBB, MBBI, VARegSaveSize, isThumb, TII);
-    BuildMI(MBB, MBBI, TII.get(ARM::tBX_RET_vararg)).addReg(ARM::R3);
-    MBB.erase(MBBI);
+
+    if (isThumb) {
+      BuildMI(MBB, MBBI, TII.get(ARM::tBX_RET_vararg)).addReg(ARM::R3);
+      MBB.erase(MBBI);
+    }
   }
 }