arm64: dts: rockchip: add pwm support for rk3328
authordavid.wu <david.wu@rock-chips.com>
Fri, 20 Jan 2017 08:09:13 +0000 (16:09 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Fri, 17 Feb 2017 09:28:48 +0000 (17:28 +0800)
Change-Id: I20d150fb258f9eb7f09623189551b982b641e7ad
Signed-off-by: david.wu <david.wu@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3328.dtsi

index 60ff14a935071013aa41c851150868011bc0a827..0e567652aa2d2b0f929e26e13bf3ecdf7136e12d 100644 (file)
                status = "disabled";
        };
 
+       pwm0: pwm@ff1b0000 {
+               compatible = "rockchip,rk3328-pwm";
+               reg = <0x0 0xff1b0000 0x0 0x10>;
+               #pwm-cells = <3>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm0_pin>;
+               clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+               clock-names = "pwm", "pclk";
+               status = "disabled";
+       };
+
+       pwm1: pwm@ff1b0010 {
+               compatible = "rockchip,rk3328-pwm";
+               reg = <0x0 0xff1b0010 0x0 0x10>;
+               #pwm-cells = <3>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm1_pin>;
+               clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+               clock-names = "pwm", "pclk";
+               status = "disabled";
+       };
+
+       pwm2: pwm@ff1b0020 {
+               compatible = "rockchip,rk3328-pwm";
+               reg = <0x0 0xff1b0020 0x0 0x10>;
+               #pwm-cells = <3>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm2_pin>;
+               clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+               clock-names = "pwm", "pclk";
+               status = "disabled";
+       };
+
+       pwm3: pwm@ff1b0030 {
+               compatible = "rockchip,rk3328-pwm";
+               reg = <0x0 0xff1b0030 0x0 0x10>;
+               interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+               #pwm-cells = <3>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwmir_pin>;
+               clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+               clock-names = "pwm", "pclk";
+               status = "disabled";
+       };
+
        amba {
                compatible = "simple-bus";
                #address-cells = <2>;