Fix fp constant loads to have a destination register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114930 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index e84989c10bb2286ce3eba8464d488fd90c6a7640..eb27fad5c3580ae96dc9c5e9dac6afe256fc4899 100644 (file)
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -397,8 +397,9 @@ unsigned ARMFastISel::ARMMaterializeFP(const ConstantFP *CFP, EVT VT) {
   unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS;
   
   // The extra reg is for addrmode5.
-  AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc))
-                  .addReg(DestReg).addConstantPoolIndex(Idx)
+  AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc),
+                          DestReg)
+                  .addConstantPoolIndex(Idx)
                   .addReg(0));
   return DestReg;
 }