bool "RGB A050VL01"
config LCD_B101EW05
bool "RGB lcd panel B101EW05"
+
+config LCD_HDMI_1280x800
+ depends on MFD_RK610
+ bool "RGB Hannstar LCD_HDMI_1280X800"
+ ---help---
+ if support RK610, this setting can support dual screen output
config LCD_HDMI_1024x768
depends on MFD_RK610
bool "RGB Hannstar LCD_HDMI_1024X768"
obj-$(CONFIG_LCD_HX8357) += lcd_hx8357.o
obj-$(CONFIG_LCD_HSD100PXN) += lcd_hsd100pxn.o
+obj-$(CONFIG_LCD_HDMI_1280x800) += lcd_hdmi_1280x800.o
obj-$(CONFIG_LCD_HDMI_1024x768) += lcd_hdmi_1024x768.o
obj-$(CONFIG_LCD_HDMI_800x480) += lcd_hdmi_800x480.o
obj-$(CONFIG_LCD_HSD07PFW1) += lcd_hsd07pfw1.o
/* Base */\r
#define OUT_TYPE SCREEN_LVDS\r
\r
-#define OUT_FORMAT LVDS_8BIT_3\r
+#define OUT_FORMAT LVDS_8BIT_2\r
#define OUT_FACE OUT_D888_P666 \r
#define OUT_CLK 65000000\r
#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ\r
\r
/* Timing */\r
-#define H_PW 48 //10\r
-#define H_BP 88 //100\r
-#define H_VD 800 //1024\r
-#define H_FP 40 //210\r
+#define H_PW 10\r
+#define H_BP 100\r
+#define H_VD 1024\r
+#define H_FP 210\r
\r
-#define V_PW 3 //10\r
-#define V_BP 32 //10\r
-#define V_VD 480 //768\r
-#define V_FP 13 //18\r
+#define V_PW 10\r
+#define V_BP 10\r
+#define V_VD 768\r
+#define V_FP 18\r
\r
#define LCD_WIDTH 202\r
#define LCD_HEIGHT 152\r
\r
/* scaler Timing */\r
//1920*1080*60\r
-#define S_OUT_CLK SCALE_RATE(148500000,66000000)\r
+#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4\r
#define S_H_PW 100\r
#define S_H_BP 100\r
#define S_H_VD 1024\r
#define S_V_ST 14\r
\r
//1920*1080*50\r
-#define S1_OUT_CLK SCALE_RATE(148500000,54000000)\r
+#define S1_OUT_CLK SCALE_RATE(148500000,54000000) //m=16 n=11 no=4 \r
#define S1_H_PW 100\r
#define S1_H_BP 100\r
#define S1_H_VD 1024\r
\r
#define S1_H_ST 1757\r
#define S1_V_ST 14\r
+\r
+//1280*720*60\r
+#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4\r
+#define S2_H_PW 100\r
+#define S2_H_BP 100\r
+#define S2_H_VD 1024\r
+#define S2_H_FP 151\r
+\r
+#define S2_V_PW 5\r
+#define S2_V_BP 15\r
+#define S2_V_VD 768\r
+#define S2_V_FP 12\r
+\r
+#define S2_H_ST 0\r
+#define S2_V_ST 12\r
+//1280*720*50\r
+\r
+#define S3_OUT_CLK SCALE_RATE(74250000,54000000) // m=32 n=11 no=4 \r
+#define S3_H_PW 100\r
+#define S3_H_BP 100\r
+#define S3_H_VD 1024\r
+#define S3_H_FP 151\r
+\r
+#define S3_V_PW 5\r
+#define S3_V_BP 15\r
+#define S3_V_VD 768\r
+#define S3_V_FP 12\r
+\r
+#define S3_H_ST 0\r
+#define S3_V_ST 12\r
+\r
+//720*576*50\r
+#define S4_OUT_CLK SCALE_RATE(27000000,54375000) //m=145 n=9 no=8 \r
+#define S4_H_PW 100\r
+#define S4_H_BP 100\r
+#define S4_H_VD 1024\r
+#define S4_H_FP 81\r
+\r
+#define S4_V_PW 5\r
+#define S4_V_BP 15\r
+#define S4_V_VD 768\r
+#define S4_V_FP 45\r
+\r
+\r
+#define S4_H_ST 435\r
+#define S4_V_ST 45\r
+//720*480*60\r
+#define S5_OUT_CLK SCALE_RATE(27000000,72000000) //m=32 n=3 no=4 \r
+#define S5_H_PW 100\r
+#define S5_H_BP 100\r
+#define S5_H_VD 1024\r
+#define S5_H_FP 81\r
+\r
+#define S5_V_PW 5\r
+#define S5_V_BP 15\r
+#define S5_V_VD 768\r
+#define S5_V_FP 51\r
+\r
+#define S5_H_ST 858\r
+#define S5_V_ST 45\r
/* Other */\r
#define DCLK_POL 0\r
#define SWAP_RB 0 \r
screen->s_hsync_st = S1_H_ST;\r
screen->s_vsync_st = S1_V_ST;\r
break;\r
+ case HDMI_1280x720p_60Hz:\r
+ /* Scaler Timing */\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S2_OUT_CLK;\r
+ screen->s_hsync_len = S2_H_PW;\r
+ screen->s_left_margin = S2_H_BP;\r
+ screen->s_right_margin = S2_H_FP;\r
+ screen->s_hsync_len = S2_H_PW;\r
+ screen->s_upper_margin = S2_V_BP;\r
+ screen->s_lower_margin = S2_V_FP;\r
+ screen->s_vsync_len = S2_V_PW;\r
+ screen->s_hsync_st = S2_H_ST;\r
+ screen->s_vsync_st = S2_V_ST;\r
+ break;\r
+ case HDMI_1280x720p_50Hz:\r
+ /* Scaler Timing */\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S3_OUT_CLK;\r
+ screen->s_hsync_len = S3_H_PW;\r
+ screen->s_left_margin = S3_H_BP;\r
+ screen->s_right_margin = S3_H_FP;\r
+ screen->s_hsync_len = S3_H_PW;\r
+ screen->s_upper_margin = S3_V_BP;\r
+ screen->s_lower_margin = S3_V_FP;\r
+ screen->s_vsync_len = S3_V_PW;\r
+ screen->s_hsync_st = S3_H_ST;\r
+ screen->s_vsync_st = S3_V_ST;\r
+ break;\r
+ case HDMI_720x576p_50Hz_4x3:\r
+ case HDMI_720x576p_50Hz_16x9:\r
+ /* Scaler Timing */\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S4_OUT_CLK;\r
+ screen->s_hsync_len = S4_H_PW;\r
+ screen->s_left_margin = S4_H_BP;\r
+ screen->s_right_margin = S4_H_FP;\r
+ screen->s_hsync_len = S4_H_PW;\r
+ screen->s_upper_margin = S4_V_BP;\r
+ screen->s_lower_margin = S4_V_FP;\r
+ screen->s_vsync_len = S4_V_PW;\r
+ screen->s_hsync_st = S4_H_ST;\r
+ screen->s_vsync_st = S4_V_ST;\r
+ break;\r
+ case HDMI_720x480p_60Hz_16x9:\r
+ case HDMI_720x480p_60Hz_4x3:\r
+ /* Scaler Timing */\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S5_OUT_CLK;\r
+ screen->s_hsync_len = S5_H_PW;\r
+ screen->s_left_margin = S5_H_BP;\r
+ screen->s_right_margin = S5_H_FP;\r
+ screen->s_hsync_len = S5_H_PW;\r
+ screen->s_upper_margin = S5_V_BP;\r
+ screen->s_lower_margin = S5_V_FP;\r
+ screen->s_vsync_len = S5_V_PW;\r
+ screen->s_hsync_st = S5_H_ST;\r
+ screen->s_vsync_st = S5_V_ST;\r
+ break;\r
default :\r
printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution);\r
return -1;\r
--- /dev/null
+#include <linux/fb.h>\r
+#include <linux/delay.h>\r
+#include <mach/gpio.h>\r
+#include <mach/iomux.h>\r
+#include <mach/board.h>\r
+#include "screen.h"\r
+#include <linux/hdmi.h>\r
+#include "../../rk29_fb.h"\r
+#include "../lcd/rk610_lcd.h"\r
+\r
+\r
+/* Base */\r
+#define OUT_TYPE SCREEN_LVDS\r
+\r
+#define OUT_FORMAT LVDS_8BIT_2\r
+\r
+#define OUT_FACE OUT_D888_P666 \r
+#define OUT_CLK 65000000\r
+#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ\r
+\r
+\r
+/* Timing */\r
+#define H_PW 10\r
+#define H_BP 10\r
+#define H_VD 1280\r
+#define H_FP 20\r
+\r
+#define V_PW 10\r
+#define V_BP 10\r
+#define V_VD 800\r
+#define V_FP 13\r
+\r
+#define LCD_WIDTH 202\r
+#define LCD_HEIGHT 152\r
+\r
+/* scaler Timing */\r
+//1920*1080*60\r
+\r
+#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4\r
+#define S_H_PW 10\r
+#define S_H_BP 10\r
+#define S_H_VD 1280\r
+#define S_H_FP 20\r
+\r
+#define S_V_PW 10\r
+#define S_V_BP 10\r
+#define S_V_VD 800\r
+#define S_V_FP 13\r
+\r
+#define S_H_ST 440\r
+#define S_V_ST 13\r
+\r
+//1920*1080*50\r
+#define S1_OUT_CLK SCALE_RATE(148500000,57375000) //m=17 n=11 no=4 \r
+#define S1_H_PW 10\r
+#define S1_H_BP 10\r
+#define S1_H_VD 1280\r
+#define S1_H_FP 77\r
+\r
+#define S1_V_PW 10\r
+#define S1_V_BP 10\r
+#define S1_V_VD 800\r
+#define S1_V_FP 13\r
+\r
+#define S1_H_ST 459\r
+#define S1_V_ST 13\r
+\r
+//1280*720*60\r
+#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4\r
+#define S2_H_PW 10\r
+#define S2_H_BP 10\r
+#define S2_H_VD 1280\r
+#define S2_H_FP 20\r
+\r
+#define S2_V_PW 10\r
+#define S2_V_BP 10\r
+#define S2_V_VD 800\r
+#define S2_V_FP 13\r
+\r
+#define S2_H_ST 440\r
+#define S2_V_ST 13\r
+\r
+//1280*720*50\r
+\r
+#define S3_OUT_CLK SCALE_RATE(74250000,57375000) // m=34 n=11 no=4\r
+#define S3_H_PW 10\r
+#define S3_H_BP 10\r
+#define S3_H_VD 1280\r
+#define S3_H_FP 77\r
+\r
+#define S3_V_PW 10\r
+#define S3_V_BP 10\r
+#define S3_V_VD 800\r
+#define S3_V_FP 13\r
+\r
+#define S3_H_ST 459\r
+#define S3_V_ST 13\r
+\r
+//720*576*50\r
+#define S4_OUT_CLK SCALE_RATE(27000000,63281250) //m=75 n=4 no=8\r
+#define S4_H_PW 10\r
+#define S4_H_BP 10\r
+#define S4_H_VD 1280\r
+#define S4_H_FP 185\r
+\r
+#define S4_V_PW 10\r
+#define S4_V_BP 10\r
+#define S4_V_VD 800\r
+#define S4_V_FP 48\r
+\r
+#define S4_H_ST 81\r
+#define S4_V_ST 48\r
+\r
+//720*480*60\r
+#define S5_OUT_CLK SCALE_RATE(27000000,75000000) //m=100 n=9 no=4\r
+#define S5_H_PW 10\r
+#define S5_H_BP 10\r
+#define S5_H_VD 1280\r
+#define S5_H_FP 130\r
+\r
+#define S5_V_PW 10\r
+#define S5_V_BP 10\r
+#define S5_V_VD 800\r
+#define S5_V_FP 54\r
+\r
+#define S5_H_ST 476\r
+#define S5_V_ST 48\r
+/* Other */\r
+#define DCLK_POL 0\r
+#define SWAP_RB 0 \r
+\r
+#ifdef CONFIG_HDMI_DUAL_DISP\r
+static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution)\r
+{\r
+ switch(hdmi_resolution){\r
+ case HDMI_1920x1080p_60Hz:\r
+ /* Scaler Timing */\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S_OUT_CLK;\r
+ screen->s_hsync_len = S_H_PW;\r
+ screen->s_left_margin = S_H_BP;\r
+ screen->s_right_margin = S_H_FP;\r
+ screen->s_hsync_len = S_H_PW;\r
+ screen->s_upper_margin = S_V_BP;\r
+ screen->s_lower_margin = S_V_FP;\r
+ screen->s_vsync_len = S_V_PW;\r
+ screen->s_hsync_st = S_H_ST;\r
+ screen->s_vsync_st = S_V_ST;\r
+ break;\r
+ case HDMI_1920x1080p_50Hz:\r
+ /* Scaler Timing */\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S1_OUT_CLK;\r
+ screen->s_hsync_len = S1_H_PW;\r
+ screen->s_left_margin = S1_H_BP;\r
+ screen->s_right_margin = S1_H_FP;\r
+ screen->s_hsync_len = S1_H_PW;\r
+ screen->s_upper_margin = S1_V_BP;\r
+ screen->s_lower_margin = S1_V_FP;\r
+ screen->s_vsync_len = S1_V_PW;\r
+ screen->s_hsync_st = S1_H_ST;\r
+ screen->s_vsync_st = S1_V_ST;\r
+ break;\r
+ case HDMI_1280x720p_60Hz:\r
+ /* Scaler Timing */\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S2_OUT_CLK;\r
+ screen->s_hsync_len = S2_H_PW;\r
+ screen->s_left_margin = S2_H_BP;\r
+ screen->s_right_margin = S2_H_FP;\r
+ screen->s_hsync_len = S2_H_PW;\r
+ screen->s_upper_margin = S2_V_BP;\r
+ screen->s_lower_margin = S2_V_FP;\r
+ screen->s_vsync_len = S2_V_PW;\r
+ screen->s_hsync_st = S2_H_ST;\r
+ screen->s_vsync_st = S2_V_ST;\r
+ break;\r
+ case HDMI_1280x720p_50Hz:\r
+ /* Scaler Timing */\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S3_OUT_CLK;\r
+ screen->s_hsync_len = S3_H_PW;\r
+ screen->s_left_margin = S3_H_BP;\r
+ screen->s_right_margin = S3_H_FP;\r
+ screen->s_hsync_len = S3_H_PW;\r
+ screen->s_upper_margin = S3_V_BP;\r
+ screen->s_lower_margin = S3_V_FP;\r
+ screen->s_vsync_len = S3_V_PW;\r
+ screen->s_hsync_st = S3_H_ST;\r
+ screen->s_vsync_st = S3_V_ST;\r
+ break;\r
+ case HDMI_720x576p_50Hz_4x3:\r
+ case HDMI_720x576p_50Hz_16x9:\r
+ /* Scaler Timing */\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S4_OUT_CLK;\r
+ screen->s_hsync_len = S4_H_PW;\r
+ screen->s_left_margin = S4_H_BP;\r
+ screen->s_right_margin = S4_H_FP;\r
+ screen->s_hsync_len = S4_H_PW;\r
+ screen->s_upper_margin = S4_V_BP;\r
+ screen->s_lower_margin = S4_V_FP;\r
+ screen->s_vsync_len = S4_V_PW;\r
+ screen->s_hsync_st = S4_H_ST;\r
+ screen->s_vsync_st = S4_V_ST;\r
+ break;\r
+ case HDMI_720x480p_60Hz_16x9:\r
+ case HDMI_720x480p_60Hz_4x3:\r
+ /* Scaler Timing */\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S5_OUT_CLK;\r
+ screen->s_hsync_len = S5_H_PW;\r
+ screen->s_left_margin = S5_H_BP;\r
+ screen->s_right_margin = S5_H_FP;\r
+ screen->s_hsync_len = S5_H_PW;\r
+ screen->s_upper_margin = S5_V_BP;\r
+ screen->s_lower_margin = S5_V_FP;\r
+ screen->s_vsync_len = S5_V_PW;\r
+ screen->s_hsync_st = S5_H_ST;\r
+ screen->s_vsync_st = S5_V_ST;\r
+ break;\r
+ default :\r
+ printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution);\r
+ return -1;\r
+ break;\r
+ }\r
+ \r
+ return 0;\r
+}\r
+#else\r
+static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){}\r
+#endif\r
+void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )\r
+{\r
+ /* screen type & face */\r
+ screen->type = OUT_TYPE;\r
+ screen->face = OUT_FACE;\r
+\r
+ /* Screen size */\r
+ screen->x_res = H_VD;\r
+ screen->y_res = V_VD;\r
+\r
+ screen->width = LCD_WIDTH;\r
+ screen->height = LCD_HEIGHT;\r
+\r
+ /* Timing */\r
+ screen->lcdc_aclk = LCDC_ACLK;\r
+ screen->pixclock = OUT_CLK;\r
+ screen->left_margin = H_BP;\r
+ screen->right_margin = H_FP;\r
+ screen->hsync_len = H_PW;\r
+ screen->upper_margin = V_BP;\r
+ screen->lower_margin = V_FP;\r
+ screen->vsync_len = V_PW;\r
+ \r
+ /* Pin polarity */\r
+ screen->pin_hsync = 0;\r
+ screen->pin_vsync = 0;\r
+ screen->pin_den = 0;\r
+ screen->pin_dclk = DCLK_POL;\r
+\r
+ /* Swap rule */\r
+ screen->swap_rb = SWAP_RB;\r
+ screen->swap_rg = 0;\r
+ screen->swap_gb = 0;\r
+ screen->swap_delta = 0;\r
+ screen->swap_dumy = 0;\r
+\r
+ /* Operation function*/\r
+ screen->init = NULL;\r
+ screen->standby = NULL;\r
+ screen->sscreen_get = set_scaler_info;\r
+ screen->sscreen_set = rk610_lcd_scaler_set_param;\r
+}\r
+\r
+\r
+\r
enum{
SCALE_PLL(148500000, 66000000, 16, 9, 4),
- SCALE_PLL(148500000, 54000000, 16, 11, 4),
+ SCALE_PLL(148500000, 57375000, 17, 11, 4),
+ SCALE_PLL(148500000, 54000000, 16, 11, 4),
SCALE_PLL(148500000, 33000000, 16, 9, 8),
SCALE_PLL(148500000, 30375000, 18, 11, 8),
SCALE_PLL(148500000, 29700000, 16, 10, 8),
SCALE_PLL(148500000, 25312500, 15, 11, 8),
SCALE_PLL(74250000, 66000000, 32, 9, 4),
+ SCALE_PLL(74250000, 57375000, 34, 11, 4),
SCALE_PLL(74250000, 54000000, 32, 11, 4),
SCALE_PLL(74250000, 33000000, 32, 9, 8),
SCALE_PLL(74250000, 30375000, 36, 11, 8),
SCALE_PLL(74250000, 25312500, 30, 11, 8),
+ SCALE_PLL(27000000, 75000000, 100, 9, 4),
+ SCALE_PLL(27000000, 72000000, 32, 3, 4),
+ SCALE_PLL(27000000, 63281250, 75, 4, 8),
+ SCALE_PLL(27000000, 54375000, 145, 9, 8),
SCALE_PLL(27000000, 31500000, 28, 3, 8),
SCALE_PLL(27000000, 30000000, 80, 9, 8),
};
projects / firefly-linux-kernel-4.4.55.git / commitdiff