ARM: permit bare dmb/dsb/isb aliases on Cortex-M0

Cortex-M0 supports these 32-bit instructions despite being Thumb1 only
(mostly). We knew about that but not that the aliases without the default "sy"
operand were also permitted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194094 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
index f09b65fd5261fbf9d3c0d919ae233d0534b49491..725e5054f728949024fbd908ed6c911f062d2812 100644 (file)
--- a/lib/Target/ARM/ARMInstrThumb2.td
+++ b/lib/Target/ARM/ARMInstrThumb2.td
@@ -4329,9 +4329,9 @@ def : t2InstAlias<"tst${p} $Rn, $Rm",
                   (t2TSTrr GPRnopc:$Rn, rGPR:$Rm, pred:$p)>;
 
 // Memory barriers
-def : InstAlias<"dmb${p}", (t2DMB 0xf, pred:$p)>, Requires<[IsThumb2, HasDB]>;
-def : InstAlias<"dsb${p}", (t2DSB 0xf, pred:$p)>, Requires<[IsThumb2, HasDB]>;
-def : InstAlias<"isb${p}", (t2ISB 0xf, pred:$p)>, Requires<[IsThumb2, HasDB]>;
+def : InstAlias<"dmb${p}", (t2DMB 0xf, pred:$p)>, Requires<[HasDB]>;
+def : InstAlias<"dsb${p}", (t2DSB 0xf, pred:$p)>, Requires<[HasDB]>;
+def : InstAlias<"isb${p}", (t2ISB 0xf, pred:$p)>, Requires<[HasDB]>;
 
 // Alias for LDR, LDRB, LDRH, LDRSB, and LDRSH without the ".w" optional
 // width specifier.

diff --git a/test/MC/ARM/thumb-hints.s b/test/MC/ARM/thumb-hints.s
index 73e83621a9538a622c9e4bca5ce4bdabe3a24854..b3c4cee40bbd09d3b38df581377d0633282dbe96 100644 (file)
--- a/test/MC/ARM/thumb-hints.s
+++ b/test/MC/ARM/thumb-hints.s
@@ -17,9 +17,21 @@
 @ CHECK: wfi                            @ encoding: [0x30,0xbf]
 @ CHECK: sev                            @ encoding: [0x40,0xbf]
 
-
 @ CHECK-EVIL-PRE-UAL: mov r8, r8                     @ encoding: [0xc0,0x46]
 
+        dmb sy
+        dmb
+        dsb sy
+        dsb
+        isb sy
+        isb
+@ CHECK: dmb   sy                      @ encoding: [0xbf,0xf3,0x5f,0x8f]
+@ CHECK: dmb   sy                      @ encoding: [0xbf,0xf3,0x5f,0x8f]
+@ CHECK: dsb   sy                      @ encoding: [0xbf,0xf3,0x4f,0x8f]
+@ CHECK: dsb   sy                      @ encoding: [0xbf,0xf3,0x4f,0x8f]
+@ CHECK: isb   sy                      @ encoding: [0xbf,0xf3,0x6f,0x8f]
+@ CHECK: isb   sy                      @ encoding: [0xbf,0xf3,0x6f,0x8f]
+
 
 @ CHECK-ERROR: error: instruction requires: armv6m or armv6t2
 @ CHECK-ERROR-NEXT: yield
@@ -32,3 +44,21 @@
 
 @ CHECK-ERROR: error: instruction requires: armv6m or armv6t2
 @ CHECK-ERROR-NEXT: sev
+
+@ CHECK-ERROR: error:
+@ CHECK-ERROR-NEXT: dmb sy
+
+@ CHECK-ERROR: error: instruction requires: data-barriers
+@ CHECK-ERROR-NEXT: dmb
+
+@ CHECK-ERROR: error:
+@ CHECK-ERROR-NEXT: dsb sy
+
+@ CHECK-ERROR: error: instruction requires: data-barriers
+@ CHECK-ERROR-NEXT: dsb
+
+@ CHECK-ERROR: error:
+@ CHECK-ERROR-NEXT: isb sy
+
+@ CHECK-ERROR: error: instruction requires: data-barriers
+@ CHECK-ERROR-NEXT: isb