ARM: OMAP2+: dma: Define dma capabilities register bitfields and use them.
authorR Sricharan <r.sricharan@ti.com>
Mon, 7 May 2012 08:32:25 +0000 (14:02 +0530)
committerSantosh Shilimkar <santosh.shilimkar@ti.com>
Tue, 8 May 2012 06:24:24 +0000 (11:54 +0530)
The system dma module has capabiities register indicating
the support for descriptor loading, constant fill, etc.
Use this instead of OMAP revision check to identify the features
supported runtime.

This avoids patching the code for feature SOCs which has
those capabilities.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
arch/arm/mach-omap2/dma.c
arch/arm/plat-omap/include/plat/dma.h

index b19d8496c16ed2dd1e62eb4afb29a08c27052110..ff75abe60af2c25eac226987d022584219cfa9fb 100644 (file)
@@ -227,10 +227,6 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
 
        dma_stride              = OMAP2_DMA_STRIDE;
        dma_common_ch_start     = CSDP;
-       if (cpu_is_omap3630() || cpu_is_omap44xx())
-               dma_common_ch_end = CCDN;
-       else
-               dma_common_ch_end = CCFN;
 
        p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL);
        if (!p) {
@@ -277,6 +273,13 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
                dev_err(&pdev->dev, "%s: kzalloc fail\n", __func__);
                return -ENOMEM;
        }
+
+       /* Check the capabilities register for descriptor loading feature */
+       if (dma_read(CAPS_0, 0) & DMA_HAS_DESCRIPTOR_CAPS)
+               dma_common_ch_end = CCDN;
+       else
+               dma_common_ch_end = CCFN;
+
        return 0;
 }
 
index dc562a5c0a8ad2c7117b0b02e43b85cabe7b9aa5..77422041e7be0a3eacd2e6e4270c6d80d50016a1 100644 (file)
 #define CLEAR_CSR_ON_READ              BIT(0xC)
 #define IS_WORD_16                     BIT(0xD)
 
+/* Defines for DMA Capabilities */
+#define DMA_HAS_TRANSPARENT_CAPS       (0x1 << 18)
+#define DMA_HAS_CONSTANT_FILL_CAPS     (0x1 << 19)
+#define DMA_HAS_DESCRIPTOR_CAPS                (0x3 << 20)
+
 enum omap_reg_offsets {
 
 GCR,           GSCR,           GRST1,          HW_ID,