ARM: tegra: add reset properties to Tegra124 DTs
authorStephen Warren <swarren@nvidia.com>
Thu, 7 Nov 2013 19:20:57 +0000 (12:20 -0700)
committerStephen Warren <swarren@nvidia.com>
Mon, 16 Dec 2013 21:09:17 +0000 (14:09 -0700)
The DT bindings now require module resets to be specified. The earlier
patches which added these nodes were originally written before that
requirement.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra124.dtsi

index 936579b806d4b384522efca784a660a179de1b87..4ed6a3a8e2de349bcac70b4c3ac2d790c04bfc23 100644 (file)
@@ -36,6 +36,7 @@
                compatible = "nvidia,tegra124-car";
                reg = <0x60006000 0x1000>;
                #clock-cells = <1>;
+               #reset-cells = <1>;
        };
 
        gpio: gpio@6000d000 {
@@ -69,6 +70,8 @@
                reg-shift = <2>;
                interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA124_CLK_UARTA>;
+               resets = <&tegra_car 6>;
+               reset-names = "serial";
                status = "disabled";
        };
 
@@ -78,6 +81,8 @@
                reg-shift = <2>;
                interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA124_CLK_UARTB>;
+               resets = <&tegra_car 7>;
+               reset-names = "serial";
                status = "disabled";
        };
 
@@ -87,6 +92,8 @@
                reg-shift = <2>;
                interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA124_CLK_UARTC>;
+               resets = <&tegra_car 55>;
+               reset-names = "serial";
                status = "disabled";
        };
 
                reg-shift = <2>;
                interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA124_CLK_UARTD>;
+               resets = <&tegra_car 65>;
+               reset-names = "serial";
                status = "disabled";
        };
 
                reg-shift = <2>;
                interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA124_CLK_UARTE>;
+               resets = <&tegra_car 66>;
+               reset-names = "serial";
                status = "disabled";
        };