SDMMC: separate the board-definition from platform-definition

diff --git a/arch/arm/boot/dts/rk3188-tb.dts b/arch/arm/boot/dts/rk3188-tb.dts
index fb1c5f03a59fce496351896fe09e007bc36bc83c..4bdbc44b5855f104f74af5747d2f1ed636b8edfb 100755 (executable)
--- a/arch/arm/boot/dts/rk3188-tb.dts
+++ b/arch/arm/boot/dts/rk3188-tb.dts
@@ -17,6 +17,47 @@
                status = "okay";
        };
 
+       
+       sdmmc2: emmc@1021C000 {
+               compatible = "rockchip,rk_mmc";
+               clock-frequency = <50000000>;
+               clock-freq-min-max = <400000 50000000>;
+
+               supports-highspeed;
+               supports-emmc;
+               bootpart-no-access;
+        
+               status = "okay";
+       };
+    
+       sdmmc0: sdmmc@10214000 {
+               compatible = "rockchip,rk_mmc";
+               clock-frequency = <50000000>;
+               clock-freq-min-max = <400000 50000000>;             
+           
+               supports-highspeed;
+               supports-sd;
+               broken-cd;
+               card-detect-delay = <200>;
+
+               pwr-gpios = <&gpio3 GPIO_A1 GPIO_ACTIVE_LOW>; /*pwr_en = GPIO3_A1*/
+           
+               status = "okay";
+       };
+       
+       
+       sdmmc1: sdio@10218000 {
+               compatible = "rockchip,rk_mmc";
+               clock-frequency = <50000000>;
+               clock-freq-min-max = <200000 50000000>;
+               
+               supports-highspeed;             
+               supports-sdio;
+
+               status = "diabled";
+       };
+
+
        wireless-wlan {
                compatible = "wlan-platdata";
 

diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 653e028effd2d9d0e1511101cf414221bb890405..d1b15f4075f9a9a6ac38354fccaf25c8061f2e03 100755 (executable)
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -7,7 +7,6 @@
 #include "rk3188-pinctrl.dtsi"
 #include "rk3188-clocks.dtsi"
 #include "rk3188_io_vol_domain.dtsi"
-#include "rk3188-mmc.dtsi"
 
 / {
        compatible = "rockchip,rk3188";
@@ -246,6 +245,50 @@
                };
        };
 
+       sdmmc2: emmc@1021C000 {
+               compatible = "rockchip,rk_mmc";
+               reg = <0x1021C000 0x4000>;
+               interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;/*irq=57*/
+               #address-cells = <1>;
+               #size-cells = <0>;
+               //pinctrl-names = "default",,"suspend";
+               //pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_wp &sd0_pwr &sd0_bus1 &sd0_bus4>;
+               clocks = <&clk_gates2 14>;
+               num-slots = <1>;                
+               fifo-depth = <0x80>;
+               bus-width = <4>;
+       };
+
+       sdmmc0: sdmmc@10214000 {
+           compatible = "rockchip,rk_mmc";
+           reg = <0x10214000 0x4000>;
+           interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; /*irq=55*/
+           #address-cells = <1>;
+           #size-cells = <0>;
+           pinctrl-names = "default","suspend";
+           pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_wp &sd0_pwr &sd0_bus1 &sd0_bus4>;
+           pinctrl-1 = <&sd0_cd_gpio>; //for int gpio?
+           clocks = <&clk_gates2 11>;
+           num-slots = <1>;    
+           fifo-depth = <0x100>;
+           bus-width = <4>;
+           
+       };
+
+       sdmmc1: sdio@10218000 {
+           compatible = "rockchip,rk_mmc";
+           reg = <0x10218000 0x4000>;
+           interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+           #address-cells = <1>;
+           #size-cells = <0>;
+           pinctrl-names = "default","suspend";
+           pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_wp &sd1_bus1 &sd1_bus4>;
+            clocks = <&clk_gates2 13>;        
+            num-slots = <1>;
+
+           fifo-depth = <0x100>;
+           bus-width = <4>;
+       };
 
        uart0: serial@10124000 {
                compatible = "rockchip,serial";