MIPS: ath79: add GPIO setup code for the QCA955X SoCs

The existing code can handle the GPIO controller of
the QCA955x SoCs. Add a minimal glue code to make it
working.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4947/
Signed-off-by: John Crispin <blogic@openwrt.org>

diff --git a/arch/mips/ath79/gpio.c b/arch/mips/ath79/gpio.c
index b7ed207e94a1e7e625af44b5c2de595e2b53fd10..8d025b028bb1558b58c43b7ead17dcfd9263786a 100644 (file)
--- a/arch/mips/ath79/gpio.c
+++ b/arch/mips/ath79/gpio.c
@@ -194,12 +194,14 @@ void __init ath79_gpio_init(void)
                ath79_gpio_count = AR933X_GPIO_COUNT;
        else if (soc_is_ar934x())
                ath79_gpio_count = AR934X_GPIO_COUNT;
+       else if (soc_is_qca955x())
+               ath79_gpio_count = QCA955X_GPIO_COUNT;
        else
                BUG();
 
        ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
        ath79_gpio_chip.ngpio = ath79_gpio_count;
-       if (soc_is_ar934x()) {
+       if (soc_is_ar934x() || soc_is_qca955x()) {
                ath79_gpio_chip.direction_input = ar934x_gpio_direction_input;
                ath79_gpio_chip.direction_output = ar934x_gpio_direction_output;
        }

diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index 8782d8b097a3f0ab5bc01166c838db54bcf6f12d..4868ed5c149bd96e47975b219523cc385d90d2cb 100644 (file)
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -510,6 +510,7 @@
 #define AR913X_GPIO_COUNT              22
 #define AR933X_GPIO_COUNT              30
 #define AR934X_GPIO_COUNT              23
+#define QCA955X_GPIO_COUNT             24
 
 /*
  * SRIF block