#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/CFG.h"
+#include "Support/STLExtras.h"
namespace llvm {
bool HaveNotEmitted = true;
if (I != opBlock.begin()) {
- MachineBasicBlock::iterator PrevInst = I;
- --PrevInst;
+ MachineBasicBlock::iterator PrevInst = prior(I);
for (unsigned i = 0, e = PrevInst->getNumOperands(); i != e; ++i) {
MachineOperand &MO = PrevInst->getOperand(i);
if (MO.isRegister() && MO.getReg() == IncomingReg)
// kills the incoming value!
//
if (!ValueIsLive) {
- MachineBasicBlock::iterator Prev = I;
- --Prev;
+ MachineBasicBlock::iterator Prev = prior(I);
LV->addVirtualRegisterKilled(SrcReg, &opBlock, Prev);
}
}
#include "llvm/Target/TargetMachine.h"
#include "Support/Debug.h"
#include "Support/Statistic.h"
+#include "Support/STLExtras.h"
#include <iostream>
using namespace llvm;
unsigned Added = MRI.copyRegToReg(*mbbi, mi, regA, regB, rc);
numInstrsAdded += Added;
- MachineBasicBlock::iterator prevMi = mi;
- --prevMi;
+ MachineBasicBlock::iterator prevMi = prior(mi);
DEBUG(std::cerr << "\t\tadded instruction: ";
prevMi->print(std::cerr, TM));
for (MachineBasicBlock::iterator MII = MBB.begin(); MII != MBB.end(); ++MII)
if (unsigned delaySlots =
TM.getInstrInfo().getNumDelaySlots(MII->getOpcode())) {
- MachineBasicBlock::iterator DelaySlotMI = MII; ++DelaySlotMI;
+ MachineBasicBlock::iterator DelaySlotMI = next(MII);
assert(DelaySlotMI != MBB.end() && "no instruction for delay slot");
// Check the 2 conditions above:
else {
// For non-branch instr with delay slots (probably a call), move
// InstrAfter to the instr. in the last delay slot.
- MachineBasicBlock::iterator tmp = MII;
- std::advance(tmp, delaySlots);
+ MachineBasicBlock::iterator tmp = next(MII, delaySlots);
move2DelayedInstr(MII, tmp);
}
}
// include all live variables before that branch or return -- we don't want to
// trample those! Verify that the set is included in the LV set before MInst.
if (MII != MBB.begin()) {
- MachineBasicBlock::iterator PredMI = MII;
- --PredMI;
+ MachineBasicBlock::iterator PredMI = prior(MII);
if (unsigned DS = TM.getInstrInfo().getNumDelaySlots(PredMI->getOpcode()))
assert(set_difference(LVI->getLiveVarSetBeforeMInst(PredMI), LVSetBef)
.empty() && "Live-var set before branch should be included in "
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
+#include "Support/STLExtras.h"
namespace llvm {
// Check if this instruction is in a delay slot of its predecessor.
if (BBI != mvec.begin()) {
const TargetInstrInfo& mii = target.getInstrInfo();
- MachineBasicBlock::iterator predMI = BBI; --predMI;
+ MachineBasicBlock::iterator predMI = prior(BBI);
if (unsigned ndelay = mii.getNumDelaySlots(predMI->getOpcode())) {
// This instruction is in a delay slot of its predecessor, so
// replace it with a nop. By replacing in place, we save having
#include "Support/Debug.h"
#include "Support/DepthFirstIterator.h"
#include "Support/Statistic.h"
+#include "Support/STLExtras.h"
#include <algorithm>
#include <set>
using namespace llvm;
continue; // Efficiently ignore non-fp insts!
MachineInstr *PrevMI = 0;
- if (I != BB.begin()) {
- MachineBasicBlock::iterator tmp = I;
- --tmp;
- PrevMI = tmp;
- }
+ if (I != BB.begin())
+ PrevMI = prior(I);
++NumFP; // Keep track of # of pseudo instrs
DEBUG(std::cerr << "\nFPInst:\t";
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/Target/MRegisterInfo.h"
#include "Support/Statistic.h"
+#include "Support/STLExtras.h"
+
using namespace llvm;
namespace {
bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
MachineBasicBlock::iterator &I) {
assert(I != MBB.end());
- MachineBasicBlock::iterator NextI = I; ++NextI;
+ MachineBasicBlock::iterator NextI = next(I);
MachineInstr *MI = I;
MachineInstr *Next = (NextI != MBB.end()) ? &*NextI : (MachineInstr*)0;
bool SSAPH::PeepholeOptimize(MachineBasicBlock &MBB,
MachineBasicBlock::iterator &I) {
- MachineBasicBlock::iterator NextI = I; ++NextI;
+ MachineBasicBlock::iterator NextI = next(I);
MachineInstr *MI = I;
MachineInstr *Next = (NextI != MBB.end()) ? &*NextI : (MachineInstr*)0;
#include "Support/Debug.h"
#include "Support/DepthFirstIterator.h"
#include "Support/Statistic.h"
+#include "Support/STLExtras.h"
#include <algorithm>
#include <set>
using namespace llvm;
continue; // Efficiently ignore non-fp insts!
MachineInstr *PrevMI = 0;
- if (I != BB.begin()) {
- MachineBasicBlock::iterator tmp = I;
- --tmp;
- PrevMI = tmp;
- }
+ if (I != BB.begin())
+ PrevMI = prior(I);
++NumFP; // Keep track of # of pseudo instrs
DEBUG(std::cerr << "\nFPInst:\t";
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/Target/MRegisterInfo.h"
#include "Support/Statistic.h"
+#include "Support/STLExtras.h"
+
using namespace llvm;
namespace {
bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
MachineBasicBlock::iterator &I) {
assert(I != MBB.end());
- MachineBasicBlock::iterator NextI = I; ++NextI;
+ MachineBasicBlock::iterator NextI = next(I);
MachineInstr *MI = I;
MachineInstr *Next = (NextI != MBB.end()) ? &*NextI : (MachineInstr*)0;
bool SSAPH::PeepholeOptimize(MachineBasicBlock &MBB,
MachineBasicBlock::iterator &I) {
- MachineBasicBlock::iterator NextI = I; ++NextI;
+ MachineBasicBlock::iterator NextI = next(I);
MachineInstr *MI = I;
MachineInstr *Next = (NextI != MBB.end()) ? &*NextI : (MachineInstr*)0;
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "Support/CommandLine.h"
+#include "Support/STLExtras.h"
namespace llvm {
MachineBasicBlock &MBB) const {
unsigned oldSize = MBB.size();
const MachineFrameInfo *MFI = MF.getFrameInfo();
- MachineBasicBlock::iterator MBBI = MBB.end(); --MBBI;
+ MachineBasicBlock::iterator MBBI = prior(MBB.end());
MachineInstr *MI;
assert(MBBI->getOpcode() == X86::RET &&
"Can only insert epilog into returning blocks");