Add rawfrm flags

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4841 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/Printer.cpp b/lib/Target/X86/Printer.cpp
index 5912778b11c506161d4202bcc3bfc6bc023b4016..4a39c2e322cdacbe628b761cbf5d40e9bc12b947 100644 (file)
--- a/lib/Target/X86/Printer.cpp
+++ b/lib/Target/X86/Printer.cpp
@@ -78,6 +78,10 @@ static bool isImmediate(const MachineOperand &MO) {
          MO.getType() == MachineOperand::MO_UnextendedImmed;
 }
 
+static bool isPCRelativeDisp(const MachineOperand &MO) {
+  return MO.getType() == MachineOperand::MO_PCRelativeDisp;
+}
+
 static bool isScale(const MachineOperand &MO) {
   return isImmediate(MO) &&
            (MO.getImmedValue() == 1 || MO.getImmedValue() == 2 ||
@@ -105,6 +109,9 @@ static void printOp(std::ostream &O, const MachineOperand &MO,
   case MachineOperand::MO_UnextendedImmed:
     O << (int)MO.getImmedValue();
     return;
+  case MachineOperand::MO_PCRelativeDisp:
+    O << "< " << MO.getVRegValue()->getName() << ">";
+    return;
   default:
     O << "<unknown op ty>"; return;    
   }
@@ -305,13 +312,25 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
     break;
 
   case X86II::RawFrm:
-    toHex(O, getBaseOpcodeFor(Opcode));
+    // The accepted forms of Raw instructions are:
+    //   1. nop     - No operand required
+    //   2. jmp foo - PC relative displacement operand
+    //
+    assert(MI->getNumOperands() == 0 ||
+           (MI->getNumOperands() == 1 && isPCRelativeDisp(MI->getOperand(0))) &&
+           "Illegal raw instruction!");
+    toHex(O, getBaseOpcodeFor(Opcode)) << " ";
+
+    if (MI->getNumOperands() == 1) {
+      Value *V = MI->getOperand(0).getVRegValue();
+      emitConstant(O, 0, 4);
+    }
+
     O << "\n\t\t\t\t";
     O << getName(MI->getOpCode()) << " ";
 
-    for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
-      if (i) O << ", ";
-      printOp(O, MI->getOperand(i), RI);
+    if (MI->getNumOperands() == 1) {
+      printOp(O, MI->getOperand(0), RI);
     }
     O << "\n";
     return;

diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp
index 5912778b11c506161d4202bcc3bfc6bc023b4016..4a39c2e322cdacbe628b761cbf5d40e9bc12b947 100644 (file)
--- a/lib/Target/X86/X86AsmPrinter.cpp
+++ b/lib/Target/X86/X86AsmPrinter.cpp
@@ -78,6 +78,10 @@ static bool isImmediate(const MachineOperand &MO) {
          MO.getType() == MachineOperand::MO_UnextendedImmed;
 }
 
+static bool isPCRelativeDisp(const MachineOperand &MO) {
+  return MO.getType() == MachineOperand::MO_PCRelativeDisp;
+}
+
 static bool isScale(const MachineOperand &MO) {
   return isImmediate(MO) &&
            (MO.getImmedValue() == 1 || MO.getImmedValue() == 2 ||
@@ -105,6 +109,9 @@ static void printOp(std::ostream &O, const MachineOperand &MO,
   case MachineOperand::MO_UnextendedImmed:
     O << (int)MO.getImmedValue();
     return;
+  case MachineOperand::MO_PCRelativeDisp:
+    O << "< " << MO.getVRegValue()->getName() << ">";
+    return;
   default:
     O << "<unknown op ty>"; return;    
   }
@@ -305,13 +312,25 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
     break;
 
   case X86II::RawFrm:
-    toHex(O, getBaseOpcodeFor(Opcode));
+    // The accepted forms of Raw instructions are:
+    //   1. nop     - No operand required
+    //   2. jmp foo - PC relative displacement operand
+    //
+    assert(MI->getNumOperands() == 0 ||
+           (MI->getNumOperands() == 1 && isPCRelativeDisp(MI->getOperand(0))) &&
+           "Illegal raw instruction!");
+    toHex(O, getBaseOpcodeFor(Opcode)) << " ";
+
+    if (MI->getNumOperands() == 1) {
+      Value *V = MI->getOperand(0).getVRegValue();
+      emitConstant(O, 0, 4);
+    }
+
     O << "\n\t\t\t\t";
     O << getName(MI->getOpCode()) << " ";
 
-    for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
-      if (i) O << ", ";
-      printOp(O, MI->getOperand(i), RI);
+    if (MI->getNumOperands() == 1) {
+      printOp(O, MI->getOperand(0), RI);
     }
     O << "\n";
     return;

diff --git a/lib/Target/X86/X86InstrInfo.def b/lib/Target/X86/X86InstrInfo.def
index bbbff33bf39641b84c225d23d4546ef4ccbf2c18..4cbccc1f4c27199e102f2caff0d9950e439b6751 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.def
+++ b/lib/Target/X86/X86InstrInfo.def
@@ -36,9 +36,9 @@ I(NOOP        , "nop",   0x90,             0, X86II::RawFrm | X86II::Void)
 
 // Flow control instructions
 I(RET         , "ret",   0xCB,    M_RET_FLAG, X86II::RawFrm | X86II::Void)       // ret
-I(JMP         , "jmp",   0xE9, M_BRANCH_FLAG, X86II::Void)                       // jmp foo
-I(JNE         , "jne",   0x85, M_BRANCH_FLAG, X86II::TB | X86II::Void)
-I(JE          , "je",    0x84, M_BRANCH_FLAG, X86II::TB | X86II::Void)
+I(JMP         , "jmp",   0xE9, M_BRANCH_FLAG, X86II::RawFrm | X86II::Void)       // jmp foo
+I(JNE         , "jne",   0x85, M_BRANCH_FLAG, X86II::RawFrm | X86II::TB | X86II::Void)
+I(JE          , "je",    0x84, M_BRANCH_FLAG, X86II::RawFrm | X86II::TB | X86II::Void)
 I(CALLpcrel32 , "call",  0xE8, M_BRANCH_FLAG, X86II::Void)
 
 // Misc instructions