Typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70695 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/MSP430/MSP430RegisterInfo.td b/lib/Target/MSP430/MSP430RegisterInfo.td
index ba604a9a651574e7d9015d42a69fefeeeb9a3fa8..2793fdc7db969d008ee22a27f324b24f243d8351 100644 (file)
--- a/lib/Target/MSP430/MSP430RegisterInfo.td
+++ b/lib/Target/MSP430/MSP430RegisterInfo.td
@@ -39,7 +39,7 @@ def R15 : MSP430Reg<15, "R15">;
 
 def MSP430Regs : RegisterClass<"MSP430", [i16], 16,
   // Volatile registers
-  [R4, R5, R6, R7, R8, R9, R9, R10, R11, R12, R13, R14, R15,
+  [R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15,
   // Volatile, but not allocable
   PC, SP, SR, CG]>
 {