ath10k: clean up PCI completion states
authorMichal Kazior <michal.kazior@tieto.com>
Tue, 13 Aug 2013 05:54:56 +0000 (07:54 +0200)
committerKalle Valo <kvalo@qca.qualcomm.com>
Wed, 14 Aug 2013 15:00:00 +0000 (18:00 +0300)
Improve code readability by using enum and a
switch-case.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
drivers/net/wireless/ath/ath10k/pci.c
drivers/net/wireless/ath/ath10k/pci.h

index 8d24c6920a5b120e160704b5ea4c0f304587de27..996efdd8a007ac2a8d663106d834e4857898b35d 100644 (file)
@@ -538,7 +538,7 @@ static void ath10k_pci_ce_send_done(struct ce_state *ce_state,
                if (!compl)
                        break;
 
-               compl->send_or_recv = HIF_CE_COMPLETE_SEND;
+               compl->state = ATH10K_PCI_COMPL_SEND;
                compl->ce_state = ce_state;
                compl->pipe_info = pipe_info;
                compl->transfer_context = transfer_context;
@@ -588,7 +588,7 @@ static void ath10k_pci_ce_recv_data(struct ce_state *ce_state,
                if (!compl)
                        break;
 
-               compl->send_or_recv = HIF_CE_COMPLETE_RECV;
+               compl->state = ATH10K_PCI_COMPL_RECV;
                compl->ce_state = ce_state;
                compl->pipe_info = pipe_info;
                compl->transfer_context = transfer_context;
@@ -810,7 +810,7 @@ static int ath10k_pci_start_ce(struct ath10k *ar)
                                return -ENOMEM;
                        }
 
-                       compl->send_or_recv = HIF_CE_COMPLETE_FREE;
+                       compl->state = ATH10K_PCI_COMPL_FREE;
                        list_add_tail(&compl->list, &pipe_info->compl_free);
                }
        }
@@ -909,12 +909,14 @@ static void ath10k_pci_process_ce(struct ath10k *ar)
                list_del(&compl->list);
                spin_unlock_bh(&ar_pci->compl_lock);
 
-               if (compl->send_or_recv == HIF_CE_COMPLETE_SEND) {
+               switch (compl->state) {
+               case ATH10K_PCI_COMPL_SEND:
                        cb->tx_completion(ar,
                                          compl->transfer_context,
                                          compl->transfer_id);
                        send_done = 1;
-               } else {
+                       break;
+               case ATH10K_PCI_COMPL_RECV:
                        ret = ath10k_pci_post_rx_pipe(compl->pipe_info, 1);
                        if (ret) {
                                ath10k_warn("Unable to post recv buffer for pipe: %d\n",
@@ -941,9 +943,17 @@ static void ath10k_pci_process_ce(struct ath10k *ar)
                                            nbytes,
                                            skb->len + skb_tailroom(skb));
                        }
+                       break;
+               case ATH10K_PCI_COMPL_FREE:
+                       ath10k_warn("free completion cannot be processed\n");
+                       break;
+               default:
+                       ath10k_warn("invalid completion state (%d)\n",
+                                   compl->state);
+                       break;
                }
 
-               compl->send_or_recv = HIF_CE_COMPLETE_FREE;
+               compl->state = ATH10K_PCI_COMPL_FREE;
 
                /*
                 * Add completion back to the pipe's free list.
index b2439f59a52f50e19f07dbeeb05ddb0ffbad2bcb..153ae283b9f91ae28eb5b12cc048000c53956639 100644 (file)
@@ -43,9 +43,15 @@ struct bmi_xfer {
        u32 resp_len;
 };
 
+enum ath10k_pci_compl_state {
+       ATH10K_PCI_COMPL_FREE = 0,
+       ATH10K_PCI_COMPL_SEND,
+       ATH10K_PCI_COMPL_RECV,
+};
+
 struct ath10k_pci_compl {
        struct list_head list;
-       int send_or_recv;
+       enum ath10k_pci_compl_state state;
        struct ce_state *ce_state;
        struct hif_ce_pipe_info *pipe_info;
        void *transfer_context;
@@ -54,11 +60,6 @@ struct ath10k_pci_compl {
        unsigned int flags;
 };
 
-/* compl_state.send_or_recv */
-#define HIF_CE_COMPLETE_FREE 0
-#define HIF_CE_COMPLETE_SEND 1
-#define HIF_CE_COMPLETE_RECV 2
-
 /*
  * PCI-specific Target state
  *