arm64: dts: rockchip: add voppwm support for rk3399

Change-Id: I16b4f77083c05ffa71d569e378ea6e3cc9b1ee54
Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 73f71d946260cf34a7815d2dc6d9b1e27d8bd0cf..9dbb5401fd411df66f78f9d3bf0020111495bb9f 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1539,6 +1539,17 @@
                };
        };
 
+       vop1_pwm: voppwm@ff8f01a0 {
+               compatible = "rockchip,vop-pwm";
+               reg = <0x0 0xff8f01a0 0x0 0x10>;
+               #pwm-cells = <3>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&vop1_pwm_pin>;
+               clocks = <&cru SCLK_VOP1_PWM>;
+               clock-names = "pwm";
+               status = "disabled";
+       };
+
        vopl_mmu: iommu@ff8f3f00 {
                compatible = "rockchip,iommu";
                reg = <0x0 0xff8f3f00 0x0 0x100>;
@@ -1581,6 +1592,17 @@
                };
        };
 
+       vop0_pwm: voppwm@ff9001a0 {
+               compatible = "rockchip,vop-pwm";
+               reg = <0x0 0xff9001a0 0x0 0x10>;
+               #pwm-cells = <3>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&vop0_pwm_pin>;
+               clocks = <&cru SCLK_VOP0_PWM>;
+               clock-names = "pwm";
+               status = "disabled";
+       };
+
        vopb_mmu: iommu@ff903f00 {
                compatible = "rockchip,iommu";
                reg = <0x0 0xff903f00 0x0 0x100>;