repair x86 performance, dejagnu problems from previous change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index e0d674090712ad369b70e90688c9df48775ce465..71923b6d671b3ef19c2141da7db304033003a8ca 100644 (file)
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -883,7 +883,8 @@ public:
   /// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
   /// and GV works for isLegalAddressImmediate _and_ both can be applied
   /// simultaneously to the same instruction.
-  virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV) const;
+  virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
+                                                    const Type* Ty) const;
 
   //===--------------------------------------------------------------------===//
   // Div utility functions

diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 83bca7570f03eba1329b998629e58bb7f6b8b267..718d983389253359f33f6a0ae024794155ec5e80 100644 (file)
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1969,8 +1969,8 @@ bool TargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
 /// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
 /// and GV works for isLegalAddressImmediate _and_ both can be applied
 /// simultaneously to the same instruction.
-bool TargetLowering::isLegalAddressScaleAndImm(int64_t S, 
-                                               GlobalValue *GV) const {
+bool TargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
+                                               const Type* Ty) const {
 
   return false;
 }

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 17a41c5aaaad221a48f0e890b6b5284c22433ac6..2521e3b1d037717e7ad6a2748aebaf7dce81505b 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -1392,8 +1392,8 @@ bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
 /// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
 /// and GV works for isLegalAddressImmediate _and_ both can be applied
 /// simultaneously to the same instruction.
-bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, 
-                                               GlobalValue *GV) const {
+bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
+                                                  const Type* Ty) const {
   return false;
 }
 

diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h
index 1675e9cffefeb19ecf15a9ac95a4318813e0765f..2c2a2cd1b237290ef15a09ed1ded5699e2c097a5 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.h
+++ b/lib/Target/ARM/ARMISelLowering.h
@@ -109,7 +109,8 @@ namespace llvm {
     /// isLegalAddressScaleAndImm - Return true if S works for 
     /// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
     /// both can be applied simultaneously to the same instruction.
-    virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV) const;
+    virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
+                                           const Type *Ty) const;
 
     /// getPreIndexedAddressParts - returns true by value, base pointer and
     /// offset pointer and addressing mode by reference if the node's address

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 117448225df1ec6c22b33ccfe32eb91999c21c89..e178646e992e61ee6d99a356ea25492bd44db294 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4064,6 +4064,22 @@ bool X86TargetLowering::isLegalAddressScale(int64_t S, const Type *Ty) const {
   }
 }
 
+/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
+/// and V works for isLegalAddressImmediate _and_ both can be applied
+/// simultaneously to the same instruction.
+bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V, 
+                                               const Type* Ty) const {
+  return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(V, Ty);
+}
+
+/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
+/// and GV works for isLegalAddressImmediate _and_ both can be applied
+/// simultaneously to the same instruction.
+bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
+                                                  const Type* Ty) const {
+  return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(GV);
+}
+
 /// isShuffleMaskLegal - Targets can use this to indicate that they only
 /// support *some* VECTOR_SHUFFLE operations, those with specific masks.
 /// By default, if a target supports the VECTOR_SHUFFLE node, all mask values

diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index 120da0fb7b45d4a1ab6c405d698dbad8b4174373..3ed8d18f4ed1244012540469c8ab41bd04a55a2f 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -349,6 +349,18 @@ namespace llvm {
     /// type.
     virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
 
+    /// isLegalAddressScaleAndImm - Return true if S works for 
+    /// IsLegalAddressScale and V works for isLegalAddressImmediate _and_ 
+    /// both can be applied simultaneously to the same instruction.
+    virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V, 
+                                           const Type *Ty) const;
+
+    /// isLegalAddressScaleAndImm - Return true if S works for 
+    /// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
+    /// both can be applied simultaneously to the same instruction.
+    virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
+                                           const Type *Ty) const;
+
     /// isShuffleMaskLegal - Targets can use this to indicate that they only
     /// support *some* VECTOR_SHUFFLE operations, those with specific masks.
     /// By default, if a target supports the VECTOR_SHUFFLE node, all mask