MIPS: Move GIC clocksource driver to drivers/clocksource/
authorAndrew Bresticker <abrestic@chromium.org>
Mon, 20 Oct 2014 19:03:58 +0000 (12:03 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 24 Nov 2014 06:45:14 +0000 (07:45 +0100)
Move the GIC clocksource driver to drivers/clocksource/mips-gic-timer.c.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8133/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/Kconfig
arch/mips/kernel/Makefile
arch/mips/kernel/csrc-gic.c [deleted file]
arch/mips/mti-malta/malta-time.c
drivers/clocksource/Kconfig
drivers/clocksource/Makefile
drivers/clocksource/mips-gic-timer.c [new file with mode: 0644]
drivers/irqchip/irq-mips-gic.c

index 3afb795c012505fd7127e184914a81d7efaaa07e..5b690cf0fec775b828fa06dcfca07620dfcbeb7b 100644 (file)
@@ -342,7 +342,7 @@ config MIPS_MALTA
        select BOOT_RAW
        select CEVT_R4K
        select CSRC_R4K
-       select CSRC_GIC
+       select CLKSRC_MIPS_GIC
        select DMA_MAYBE_COHERENT
        select GENERIC_ISA_DMA
        select HAVE_PCSPKR_PLATFORM
@@ -385,7 +385,7 @@ config MIPS_SEAD3
        select BUILTIN_DTB
        select CEVT_R4K
        select CSRC_R4K
-       select CSRC_GIC
+       select CLKSRC_MIPS_GIC
        select CPU_MIPSR2_IRQ_VI
        select CPU_MIPSR2_IRQ_EI
        select DMA_NONCOHERENT
@@ -954,10 +954,6 @@ config CSRC_IOASIC
 config CSRC_R4K
        bool
 
-config CSRC_GIC
-       select MIPS_CM
-       bool
-
 config CSRC_SB1250
        bool
 
index 0945d804ec3aa6eb2f3818d6bf57459875184fd0..1aedbf5e42327fe5889f18fea30ec068e628042f 100644 (file)
@@ -24,7 +24,6 @@ obj-$(CONFIG_CEVT_GT641XX)    += cevt-gt641xx.o
 obj-$(CONFIG_CEVT_SB1250)      += cevt-sb1250.o
 obj-$(CONFIG_CEVT_TXX9)                += cevt-txx9.o
 obj-$(CONFIG_CSRC_BCM1480)     += csrc-bcm1480.o
-obj-$(CONFIG_CSRC_GIC)         += csrc-gic.o
 obj-$(CONFIG_CSRC_IOASIC)      += csrc-ioasic.o
 obj-$(CONFIG_CSRC_R4K)         += csrc-r4k.o
 obj-$(CONFIG_CSRC_SB1250)      += csrc-sb1250.o
diff --git a/arch/mips/kernel/csrc-gic.c b/arch/mips/kernel/csrc-gic.c
deleted file mode 100644 (file)
index 0bf28e6..0000000
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
- */
-#include <linux/init.h>
-#include <linux/irqchip/mips-gic.h>
-#include <linux/time.h>
-
-static cycle_t gic_hpt_read(struct clocksource *cs)
-{
-       return gic_read_count();
-}
-
-static struct clocksource gic_clocksource = {
-       .name   = "GIC",
-       .read   = gic_hpt_read,
-       .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
-void __init gic_clocksource_init(unsigned int frequency)
-{
-       /* Set clocksource mask. */
-       gic_clocksource.mask = CLOCKSOURCE_MASK(gic_get_count_width());
-
-       /* Calculate a somewhat reasonable rating value. */
-       gic_clocksource.rating = 200 + frequency / 10000000;
-
-       clocksource_register_hz(&gic_clocksource, frequency);
-}
index 608655f8e6dd3ced08569c0f2a80477a3e81b81a..028fae07700138997680025ad9e92fc648591227 100644 (file)
@@ -183,7 +183,7 @@ void __init plat_time_init(void)
                freq = freqround(gic_frequency, 5000);
                printk("GIC frequency %d.%02d MHz\n", freq/1000000,
                       (freq%1000000)*100/1000000);
-#ifdef CONFIG_CSRC_GIC
+#ifdef CONFIG_CLKSRC_MIPS_GIC
                gic_clocksource_init(gic_frequency);
 #endif
        }
index 90420600e1eb1d6668d78eb6eb809e218d25673f..cb7e7f417a60198d58072f8ee5507d80df6804f1 100644 (file)
@@ -223,4 +223,8 @@ config CLKSRC_VERSATILE
          ARM Versatile, RealView and Versatile Express reference
          platforms.
 
+config CLKSRC_MIPS_GIC
+       bool
+       depends on MIPS_GIC
+
 endmenu
index 756f6f10efa03de825a9b1ef48edf8315f331161..e23fc2d5fc2746a9f6f38be88f70919df861ccda 100644 (file)
@@ -46,3 +46,4 @@ obj-$(CONFIG_CLKSRC_METAG_GENERIC)    += metag_generic.o
 obj-$(CONFIG_ARCH_HAS_TICK_BROADCAST)  += dummy_timer.o
 obj-$(CONFIG_ARCH_KEYSTONE)            += timer-keystone.o
 obj-$(CONFIG_CLKSRC_VERSATILE)         += versatile.o
+obj-$(CONFIG_CLKSRC_MIPS_GIC)          += mips-gic-timer.o
diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
new file mode 100644 (file)
index 0000000..0bf28e6
--- /dev/null
@@ -0,0 +1,32 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/irqchip/mips-gic.h>
+#include <linux/time.h>
+
+static cycle_t gic_hpt_read(struct clocksource *cs)
+{
+       return gic_read_count();
+}
+
+static struct clocksource gic_clocksource = {
+       .name   = "GIC",
+       .read   = gic_hpt_read,
+       .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+void __init gic_clocksource_init(unsigned int frequency)
+{
+       /* Set clocksource mask. */
+       gic_clocksource.mask = CLOCKSOURCE_MASK(gic_get_count_width());
+
+       /* Calculate a somewhat reasonable rating value. */
+       gic_clocksource.rating = 200 + frequency / 10000000;
+
+       clocksource_register_hz(&gic_clocksource, frequency);
+}
index fbe2ceda4928d76171bbb7418a0e34e07211fe96..035d5ad435f9bcef61d2b90f82490983872a0195 100644 (file)
@@ -103,7 +103,7 @@ static inline void gic_map_to_vpe(unsigned int intr, unsigned int vpe)
                  GIC_SH_MAP_TO_VPE_REG_BIT(vpe));
 }
 
-#if defined(CONFIG_CSRC_GIC) || defined(CONFIG_CEVT_GIC)
+#if defined(CONFIG_CLKSRC_MIPS_GIC) || defined(CONFIG_CEVT_GIC)
 cycle_t gic_read_count(void)
 {
        unsigned int hi, hi2, lo;