ARM: tegra: clock: Allow any clock to be a shared clock

Change-Id: I7e6be30c7870e8b00a165f99655cd95b917fc6db
Signed-off-by: Colin Cross <ccross@android.com>

diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h
index 083815487c17c986cf010e2140ba5dac26d322e6..edd9b3fd01a992411245dee3979d3435b3818d1d 100644 (file)
--- a/arch/arm/mach-tegra/clock.h
+++ b/arch/arm/mach-tegra/clock.h
@@ -89,6 +89,7 @@ struct clk {
        unsigned long           dvfs_rate;
        unsigned long           rate;
        unsigned long           max_rate;
+       unsigned long           min_rate;
        bool                    is_dvfs;
        bool                    auto_dvfs;
        bool                    cansleep;
@@ -105,6 +106,8 @@ struct clk {
        u32                             reg;
        u32                             reg_shift;
 
+       struct list_head                shared_bus_list;
+
        union {
                struct {
                        unsigned int                    clk_num;
@@ -127,10 +130,6 @@ struct clk {
                        struct clk                      *main;
                        struct clk                      *backup;
                } cpu;
-               struct {
-                       struct list_head                list;
-                       unsigned long                   min_rate;
-               } shared_bus;
                struct {
                        struct list_head                node;
                        bool                            enabled;

diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index c6fca17a28be4407fa63353f4c18c5af75d32192..d3bd446289dd3d06c5763dffaff4451a24d9c799 100644 (file)
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -302,8 +302,6 @@ static void tegra2_super_clk_init(struct clk *c)
        }
        BUG_ON(sel->input == NULL);
        c->parent = sel->input;
-
-       INIT_LIST_HEAD(&c->u.shared_bus.list);
 }
 
 static int tegra2_super_clk_enable(struct clk *c)
@@ -1151,9 +1149,9 @@ static struct clk_ops tegra_cdev_clk_ops = {
 static void tegra_clk_shared_bus_update(struct clk *bus)
 {
        struct clk *c;
-       unsigned long rate = bus->u.shared_bus.min_rate;
+       unsigned long rate = bus->min_rate;
 
-       list_for_each_entry(c, &bus->u.shared_bus.list,
+       list_for_each_entry(c, &bus->shared_bus_list,
                        u.shared_bus_user.node) {
                if (c->u.shared_bus_user.enabled)
                        rate = max(c->u.shared_bus_user.rate, rate);
@@ -1170,7 +1168,7 @@ static void tegra_clk_shared_bus_init(struct clk *c)
        c->set = true;
 
        list_add_tail(&c->u.shared_bus_user.node,
-               &c->parent->u.shared_bus.list);
+               &c->parent->shared_bus_list);
 }
 
 static int tegra_clk_shared_bus_set_rate(struct clk *c, unsigned long rate)
@@ -1716,9 +1714,7 @@ static struct clk tegra_clk_sclk = {
        .reg    = 0x28,
        .ops    = &tegra_super_ops,
        .max_rate = 240000000,
-       .u.shared_bus = {
-               .min_rate = 120000000,
-       },
+       .min_rate = 120000000,
 };
 
 static struct clk tegra_clk_virtual_cpu = {
@@ -2017,6 +2013,7 @@ struct clk *tegra_ptr_clks[] = {
 static void tegra2_init_one_clock(struct clk *c)
 {
        clk_init(c);
+       INIT_LIST_HEAD(&c->shared_bus_list);
        if (!c->lookup.dev_id && !c->lookup.con_id)
                c->lookup.con_id = c->name;
        c->lookup.clk = c;