ARM64: dts: rk3399: fix enable incorrect HCLK_I2Sx when startup
authorXing Zheng <zhengxing@rock-chips.com>
Wed, 30 Mar 2016 06:29:54 +0000 (14:29 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Wed, 30 Mar 2016 07:19:07 +0000 (15:19 +0800)
This patch like below:
----
commit 3860aa1ccfe01adb6c3fd09e880d812ceb408e5c
Author: Heiko Stuebner <heiko@sntech.de>
Date:   Sat Jan 9 03:18:51 2016 +0100

    ARM: dts: rockchip: swap i2s clock ordering on rk3036

    For sound setups using the simple-card mechanism, the main clock
    (sysclk) is expected to be the first element. For the i2s-driver
    itself it doesn't matter, as it uses named clocks, so we can just
    swap them.
----
If we set HCLK_I2Sx at first, rockchip_i2s_set_sysclk will set the
HCLK_I2S freq (from example is 100MHz) to set the i2s_div, it is
incorrect.

Change-Id: I2b424ded3845b8ccd3ef233e43c5f9f915544547
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index 6b9d4959d6f06007567a4482856f9dc84e857c94..2defa2b7e490f9587cc26da4a2b832489f7361eb 100644 (file)
                interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
                dmas = <&dmac_bus 7>;
                dma-names = "tx";
-               clock-names = "hclk", "mclk";
-               clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF_8CH>;
+               clock-names = "mclk", "hclk";
+               clocks = <&cru SCLK_SPDIF_8CH>, <&cru HCLK_SPDIF>;
                pinctrl-names = "default";
                pinctrl-0 = <&spdif_bus>;
                status = "disabled";
                #size-cells = <0>;
                dmas = <&dmac_bus 0>, <&dmac_bus 1>;
                dma-names = "tx", "rx";
-               clock-names = "i2s_hclk", "i2s_clk";
-               clocks = <&cru HCLK_I2S0_8CH>, <&cru SCLK_I2S0_8CH>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S0_8CH>, <&cru HCLK_I2S0_8CH>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2s0_8ch_bus>;
                status = "disabled";
                #size-cells = <0>;
                dmas = <&dmac_bus 2>, <&dmac_bus 3>;
                dma-names = "tx", "rx";
-               clock-names = "i2s_hclk", "i2s_clk";
-               clocks = <&cru HCLK_I2S1_8CH>, <&cru SCLK_I2S1_8CH>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S1_8CH>, <&cru HCLK_I2S1_8CH>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2s1_2ch_bus>;
                status = "disabled";
                #size-cells = <0>;
                dmas = <&dmac_bus 4>, <&dmac_bus 5>;
                dma-names = "tx", "rx";
-               clock-names = "i2s_hclk", "i2s_clk";
-               clocks = <&cru HCLK_I2S2_8CH>, <&cru SCLK_I2S2_8CH>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S2_8CH>, <&cru HCLK_I2S2_8CH>;
                status = "disabled";
        };