lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
}
- if(lcdc_dev->driver.win[2]->state == 1) {
+ if (lcdc_dev->driver.win[2]->state == 1) {
mask = m_HWC_ALPAH_EN;
val = v_HWC_ALPAH_EN(1);
lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
mask = m_HWC_EN | m_HWC_LODAD_EN;
val = v_HWC_EN(win->state) | v_HWC_LODAD_EN(1);
lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
- if((win->area[0].xsize == 32) &&(win->area[0].ysize == 32))
+ if ((win->area[0].xsize == 32) &&
+ (win->area[0].ysize == 32))
hwc_size = 0;
- else if((win->area[0].xsize == 64) &&(win->area[0].ysize == 64))
+ else if ((win->area[0].xsize == 64) &&
+ (win->area[0].ysize == 64))
hwc_size = 1;
else
- dev_err(lcdc_dev->dev,"unsupport hwc size:x=%d,y=%d\n",
- win->area[0].xsize,win->area[0].ysize);
+ dev_err(lcdc_dev->dev,
+ "unsupport hwc size:x=%d,y=%d\n",
+ win->area[0].xsize,
+ win->area[0].ysize);
lcdc_writel(lcdc_dev, HWC_DSP_ST,
v_DSP_STX(win->area[0].dsp_stx) |
v_DSP_STY(win->area[0].dsp_sty));
struct lcdc_device *lcdc_dev =
container_of(dev_drv, struct lcdc_device, driver);
- spin_lock(&lcdc_dev->reg_lock);
+ /*spin_lock(&lcdc_dev->reg_lock);*/
if (likely(lcdc_dev->clk_on)) {
mask = m_MMU_EN | m_AXI_MAX_OUTSTANDING_EN |
m_AXI_OUTSTANDING_MAX_NUM;
v_AXI_MAX_OUTSTANDING_EN(1);
lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
}
- spin_unlock(&lcdc_dev->reg_lock);
+ /*spin_unlock(&lcdc_dev->reg_lock);*/
}
-static int rk3036_lcdc_set_hwc_lut(struct rk_lcdc_driver *dev_drv, int *hwc_lut,int mode)
+static int rk3036_lcdc_set_hwc_lut(struct rk_lcdc_driver *dev_drv,
+ int *hwc_lut, int mode)
{
int i = 0;
int __iomem *c;
int v;
- int len=256*4;
+ int len = 256*4;
+
struct lcdc_device *lcdc_dev =
- container_of(dev_drv, struct lcdc_device, driver);
- if(dev_drv->hwc_lut == NULL) {
+ container_of(dev_drv, struct lcdc_device, driver);
+ if (dev_drv->hwc_lut == NULL)
dev_drv->hwc_lut = devm_kzalloc(lcdc_dev->dev, len, GFP_KERNEL);
- }
+
spin_lock(&lcdc_dev->reg_lock);
lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_HWC_LUT_EN, v_HWC_LUT_EN(0));
lcdc_cfg_done(lcdc_dev);
mdelay(25);
for (i = 0; i < 256; i++) {
- if(mode == 1)
+ if (mode == 1)
dev_drv->hwc_lut[i] = hwc_lut[i];
v = dev_drv->hwc_lut[i];
c = lcdc_dev->hwc_lut_addr_base + i;
writel_relaxed(v, c);
}
lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_HWC_LUT_EN, v_HWC_LUT_EN(1));
- lcdc_cfg_done(lcdc_dev);
- spin_unlock(&lcdc_dev->reg_lock);
-
+ lcdc_cfg_done(lcdc_dev);
+ spin_unlock(&lcdc_dev->reg_lock);
return 0;
-
}
+
+#if 0
static int rk3036_lcdc_set_dclk(struct rk_lcdc_driver *dev_drv)
{
#ifdef CONFIG_RK_FPGA
lcdc_dev->driver.name, clk_get_rate(lcdc_dev->dclk), fps);
return 0;
}
-
+#endif
/********do basic init*********/
static int rk3036_lcdc_pre_init(struct rk_lcdc_driver *dev_drv)
{
dev_drv->mmu_dts_name);
if (dev_drv->mmu_dev) {
rk_fb_platform_set_sysmmu(dev_drv->mmu_dev,
- dev_drv->dev);
- rockchip_iovmm_activate(dev_drv->dev);
+ dev_drv->dev);
} else {
dev_err(dev_drv->dev,
"failed to get iommu device\n"
}
#endif
rk3036_lcdc_reg_restore(lcdc_dev);
- if (dev_drv->iommu_enabled)
- rk3036_lcdc_mmu_en(dev_drv);
+ /*if (dev_drv->iommu_enabled)
+ rk3036_lcdc_mmu_en(dev_drv);*/
if ((support_uboot_display() && (lcdc_dev->prop == PRMRY))) {
- rk3036_lcdc_set_dclk(dev_drv);
+ /*rk3036_lcdc_set_dclk(dev_drv);*/
rk3036_lcdc_enable_irq(dev_drv);
} else {
rk3036_load_screen(dev_drv, 1);
win = dev_drv->win[1];
} else if (win_id == 2) {
win = dev_drv->win[2];
- }else {
+ } else {
dev_err(dev_drv->dev, "invalid win number:%d!\n", win_id);
return -EINVAL;
}
spin_lock(&lcdc_dev->reg_lock);
if (lcdc_dev->clk_on) {
+ #if defined(CONFIG_ROCKCHIP_IOMMU)
+ if (dev_drv->iommu_enabled) {
+ if (!lcdc_dev->iommu_status && dev_drv->mmu_dev) {
+ lcdc_dev->iommu_status = 1;
+ if (support_uboot_display() &&
+ lcdc_dev->prop == PRMRY) {
+ lcdc_msk_reg(lcdc_dev, SYS_CTRL,
+ m_WIN0_EN,
+ v_WIN0_EN(0));
+ }
+ lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
+ v_LCDC_STANDBY(1));
+ lcdc_cfg_done(lcdc_dev);
+ mdelay(50);
+ rockchip_iovmm_activate(dev_drv->dev);
+ rk3036_lcdc_mmu_en(dev_drv);
+ }
+ }
+ #endif
+
lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
v_LCDC_STANDBY(lcdc_dev->standby));
lcdc_cfg_done(lcdc_dev);
.get_dsp_bcsh_bcs = rk3036_lcdc_get_bcsh_bcs,
.open_bcsh = rk3036_lcdc_open_bcsh,
.set_overscan = rk3036_lcdc_set_overscan,
- .set_hwc_lut = rk3036_lcdc_set_hwc_lut,
+ .set_hwc_lut = rk3036_lcdc_set_hwc_lut,
};
static int rk3036_lcdc_parse_dt(struct lcdc_device *lcdc_dev)
return PTR_ERR(lcdc_dev->regsbak);
lcdc_dev->hwc_lut_addr_base = (lcdc_dev->regs + HWC_LUT_ADDR);
-
+ lcdc_dev->prop = PRMRY;
dev_set_name(lcdc_dev->dev, "lcdc%d", lcdc_dev->id);
dev_drv = &lcdc_dev->driver;
dev_drv->dev = dev;