add rga driver that are debugged
authorzsq <zsq@rock-chips.com>
Tue, 17 Jul 2012 01:13:40 +0000 (09:13 +0800)
committerzsq <zsq@rock-chips.com>
Tue, 17 Jul 2012 01:13:40 +0000 (09:13 +0800)
arch/arm/mach-rk2928/devices.c
arch/arm/mach-rk30/include/mach/io.h [changed mode: 0644->0755]
drivers/video/rockchip/rga/Kconfig
drivers/video/rockchip/rga/rga.h
drivers/video/rockchip/rga/rga_drv.c

index 65088c834bcc0808655b71c53e03522d341b0224..51b3d6b42f0306ebafc8f050cff54c6401fc9bf1 100755 (executable)
@@ -493,8 +493,8 @@ static void __init rk2928_init_spim(void)
 #ifdef CONFIG_RGA_RK30
 static struct resource resource_rga[] = {
        [0] = {
-               .start = RK30_RGA_PHYS,
-               .end   = RK30_RGA_PHYS + RK30_RGA_SIZE - 1,
+               .start = RK2928_RGA_PHYS,
+               .end   = RK2928_RGA_PHYS + RK2928_RGA_SIZE - 1,
                .flags = IORESOURCE_MEM,
        },
        [1] = {
old mode 100644 (file)
new mode 100755 (executable)
index 062123b..4e63be2
@@ -44,7 +44,7 @@
 #define RK30_LCDC1_SIZE         SZ_8K
 #define RK30_IPP_PHYS           0x10110000
 #define RK30_IPP_SIZE           SZ_16K
-#define RK30_RGA_PHYS           0x10114000
+#define RK30_RGA_PHYS           0x1010c000
 #define RK30_RGA_SIZE           SZ_8K
 #define RK30_HDMI_PHYS          0x10116000
 #define RK30_HDMI_SIZE          SZ_8K
index 4653cd8a1c70f4dc53f97bf13bfbcd61c16e2677..152e2bd55ef023c6c2b14057f213c11df5efa386 100755 (executable)
@@ -1,8 +1,8 @@
 menu "RGA"
-       depends on ARCH_RK30
+       depends on ARCH_RK30 || ARCH_RK2928
 
 config RGA_RK30
-       tristate "ROCKCHIP RK30 RGA"
+       tristate "ROCKCHIP RK30 || RK2928 RGA"
        help
          rk30 rga module.
 
index 9b30f05045fb256e60267a698fddfb1a664605b1..ff741623f176b8a2ac6c5063718c6c1dceda9b4d 100755 (executable)
@@ -386,7 +386,7 @@ typedef struct rga_service_info {
 \r
 \r
 \r
-#define RGA_BASE                 0x10114000\r
+#define RGA_BASE                 0x1010c000\r
 \r
 //General Registers\r
 #define RGA_SYS_CTRL             0x000\r
index ae966f488a298ae24f4692c17a5941ac1fbabc16..00fa3796019a12a5834cba17661db6db8af78b20 100755 (executable)
@@ -60,7 +60,7 @@
 \r
 #define RGA_MAJOR              255\r
 \r
-#define RK30_RGA_PHYS  0x10114000\r
+#define RK30_RGA_PHYS  0x1010C000\r
 #define RK30_RGA_SIZE  SZ_8K\r
 #define RGA_RESET_TIMEOUT      1000\r
 \r
@@ -100,7 +100,7 @@ static void rga_try_set_reg(void);
 \r
 \r
 /* Logging */\r
-#define RGA_DEBUG 0\r
+#define RGA_DEBUG 1\r
 #if RGA_DEBUG\r
 #define DBG(format, args...) printk(KERN_DEBUG "%s: " format, DRIVER_NAME, ## args)\r
 #define ERR(format, args...) printk(KERN_ERR "%s: " format, DRIVER_NAME, ## args)\r
@@ -124,6 +124,7 @@ static inline u32 rga_read(u32 r)
        return __raw_readl(drvdata->rga_base + r);\r
 }\r
 \r
+#if 0\r
 static void rga_soft_reset(void)\r
 {\r
        u32 i;\r
@@ -144,6 +145,7 @@ static void rga_soft_reset(void)
        if(i == RGA_RESET_TIMEOUT)\r
                ERR("soft reset timeout.\n");\r
 }\r
+#endif\r
 \r
 static void rga_dump(void)\r
 {\r
@@ -571,7 +573,7 @@ static void rga_try_set_reg(void)
             dmac_flush_range(&rga_service.cmd_buff[0], &rga_service.cmd_buff[28]);\r
             outer_flush_range(virt_to_phys(&rga_service.cmd_buff[0]),virt_to_phys(&rga_service.cmd_buff[28]));\r
 \r
-            rga_soft_reset();\r
+            //rga_soft_reset();\r
             rga_write(0, RGA_MMU_CTRL);\r
 \r
             /* CMD buff */\r
@@ -588,7 +590,6 @@ static void rga_try_set_reg(void)
                     printk("%.8x %.8x %.8x %.8x\n", p[0 + i*4], p[1+i*4], p[2 + i*4], p[3 + i*4]);\r
             }\r
 #endif\r
-\r
             /* master mode */\r
             rga_write((0x1<<2)|(0x1<<3), RGA_SYS_CTRL);\r
 \r
@@ -609,10 +610,10 @@ static void rga_try_set_reg(void)
             }\r
 #endif\r
         }\r
-        else\r
-        {\r
+//        else\r
+//        {\r
 //          rga_power_off();\r
-        }\r
+//        }\r
     }\r
 }\r
 \r
@@ -1037,6 +1038,7 @@ static irqreturn_t rga_irq_thread(int irq, void *dev_id)
                rga_del_running_list();\r
                rga_try_set_reg();\r
        }\r
+    printk("****** rga irq prc avil ******\n");\r
        mutex_unlock(&rga_service.lock);\r
 \r
        return IRQ_HANDLED;\r
@@ -1079,6 +1081,8 @@ static int __devinit rga_drv_probe(struct platform_device *pdev)
        rga_service.last_prc_src_format = 1; /* default is yuv first*/\r
        rga_service.enable = false;\r
 \r
+    printk("rga_drv_probe\n");\r
+\r
        data = kzalloc(sizeof(struct rga_drvdata), GFP_KERNEL);\r
        if(NULL == data)\r
        {\r
@@ -1247,12 +1251,15 @@ static void __exit rga_exit(void)
 \r
 #if 0\r
 \r
+#if 1\r
 extern struct fb_info * rk_get_fb(int fb_id);\r
 EXPORT_SYMBOL(rk_get_fb);\r
 \r
 extern void rk_direct_fb_show(struct fb_info * fbi);\r
 EXPORT_SYMBOL(rk_direct_fb_show);\r
 \r
+#endif\r
+\r
 unsigned int src_buf[1920*1080];\r
 unsigned int dst_buf[1920*1080];\r
 \r
@@ -1276,9 +1283,9 @@ void rga_test_0(void)
        //file->private_data = (void *)session;\r
 \r
     fb = rk_get_fb(0);\r
-\r
+    \r
     memset(&req, 0, sizeof(struct rga_req));\r
-    src = Y4200_320_240_swap0;\r
+    src = src_buf;\r
     dst = dst_buf;\r
 \r
     //memset(src_buf, 0x80, 1920*1080*4);\r
@@ -1294,15 +1301,15 @@ void rga_test_0(void)
     outer_flush_range(virt_to_phys(&dst_buf[0]),virt_to_phys(&dst_buf[800*480]));\r
     #endif\r
 \r
-    req.src.act_w = 320;\r
-    req.src.act_h = 240;\r
+    req.src.act_w = 1280;\r
+    req.src.act_h = 800;\r
 \r
-    req.src.vir_w = 320;\r
-    req.src.vir_h = 240;\r
-    req.src.yrgb_addr = (uint32_t)src;\r
-    req.src.uv_addr = (uint32_t)UV4200_320_240_swap0;\r
-    req.src.v_addr = (uint32_t)V4200_320_240_swap0;\r
-    req.src.format = RK_FORMAT_YCbCr_420_SP;\r
+    req.src.vir_w = 1280;\r
+    req.src.vir_h = 800;\r
+    req.src.yrgb_addr = (uint32_t)virt_to_phys(src);\r
+    req.src.uv_addr = (uint32_t)virt_to_phys(src);\r
+    req.src.v_addr = (uint32_t)virt_to_phys(src);\r
+    req.src.format = 0;\r
 \r
     req.dst.act_w = 1280;\r
     req.dst.act_h = 800;\r
@@ -1311,7 +1318,7 @@ void rga_test_0(void)
     req.dst.vir_h = 800;\r
     req.dst.x_offset = 0;\r
     req.dst.y_offset = 0;\r
-    req.dst.yrgb_addr = (uint32_t)dst;\r
+    req.dst.yrgb_addr = (uint32_t)virt_to_phys(dst);\r
 \r
     //req.dst.format = RK_FORMAT_RGB_565;\r
 \r
@@ -1337,8 +1344,52 @@ void rga_test_0(void)
 \r
     rga_blit_sync(&session, &req);\r
 \r
-    fb->var.bits_per_pixel = 32;\r
+    req.src.act_w = 1280;\r
+    req.src.act_h = 800;\r
+\r
+    req.src.vir_w = 1280;\r
+    req.src.vir_h = 800;\r
+    req.src.yrgb_addr = (uint32_t)virt_to_phys(src);\r
+    req.src.uv_addr = (uint32_t)virt_to_phys(src);\r
+    req.src.v_addr = (uint32_t)virt_to_phys(src);\r
+    req.src.format = RK_FORMAT_YCbCr_420_SP;\r
+\r
+    req.dst.act_w = 1280;\r
+    req.dst.act_h = 800;\r
+\r
+    req.dst.vir_w = 1280;\r
+    req.dst.vir_h = 800;\r
+    req.dst.x_offset = 0;\r
+    req.dst.y_offset = 0;\r
+    req.dst.yrgb_addr = (uint32_t)virt_to_phys(dst);\r
+\r
+    //req.dst.format = RK_FORMAT_RGB_565;\r
 \r
+    req.clip.xmin = 0;\r
+    req.clip.xmax = 1279;\r
+    req.clip.ymin = 0;\r
+    req.clip.ymax = 799;\r
+\r
+    //req.render_mode = color_fill_mode;\r
+    //req.fg_color = 0x80ffffff;\r
+\r
+    req.rotate_mode = 1;\r
+    req.scale_mode = 2;\r
+\r
+    //req.alpha_rop_flag = 0;\r
+    //req.alpha_rop_mode = 0x1;\r
+\r
+    req.sina = 0;\r
+    req.cosa = 65536;\r
+\r
+    //req.mmu_info.mmu_flag = 0x21;\r
+    //req.mmu_info.mmu_en = 1;\r
+\r
+    rga_blit_sync(&session, &req);\r
+\r
+    #if 0\r
+    fb->var.bits_per_pixel = 32;\r
+    \r
     fb->var.xres = 1280;\r
     fb->var.yres = 800;\r
 \r
@@ -1365,6 +1416,7 @@ void rga_test_0(void)
     fb->fix.smem_start = virt_to_phys(dst);\r
 \r
     rk_direct_fb_show(fb);\r
+    #endif\r
 \r
 }\r
 \r