Remove some redundant checks, add a couple of new ones. This allows us to

compile this:

int foo (unsigned long a, unsigned long long g) {
  return a >= g;
}

To:

foo:
        movl 8(%esp), %eax
        cmpl %eax, 4(%esp)
        setae %al
        cmpl $0, 12(%esp)
        sete %cl
        andb %al, %cl
        movzbl %cl, %eax
        ret

instead of:

foo:
        movl 8(%esp), %eax
        cmpl %eax, 4(%esp)
        setae %al
        movzbw %al, %cx
        movl 12(%esp), %edx
        cmpl $0, %edx
        sete %al
        movzbw %al, %ax
        cmpl $0, %edx
        cmove %cx, %ax
        movzbl %al, %eax
        ret

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21244 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 0243ebf5df3d3b02456f0e68368485be2049ff13..634197c0f96bfacb93b6a9f9434b6d429214ca7a 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -960,12 +960,6 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
 
     if (VT == MVT::i1) {  // Boolean SELECT
       if (N2C) {
-        if (N3C) {
-          if (N2C->getValue()) // select C, 1, 0 -> C
-            return N1;
-          return getNode(ISD::XOR, VT, N1, N3); // select C, 0, 1 -> ~C
-        }
-
         if (N2C->getValue())   // select C, 1, X -> C | X
           return getNode(ISD::OR, VT, N1, N3);
         else                   // select C, 0, X -> ~C & X
@@ -980,6 +974,11 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
         else                   // select C, X, 0 -> C & X
           return getNode(ISD::AND, VT, N1, N2);
       }
+
+      if (N1 == N2)   // X ? X : Y --> X ? 1 : Y --> X | Y
+        return getNode(ISD::OR, VT, N1, N3);
+      if (N1 == N3)   // X ? Y : X --> X ? Y : 0 --> X & Y
+        return getNode(ISD::AND, VT, N1, N2);
     }
 
     // If this is a selectcc, check to see if we can simplify the result.
@@ -1001,7 +1000,6 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
               N2.getOperand(0) == N3)
             return getNode(ISD::FABS, VT, N3);
         }
-
     }
     break;
   case ISD::BRCOND: