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phy: rockchip-emmc: Fix the macro for ctrl_base.
author
Ziyuan Xu
<xzy.xu@rock-chips.com>
Wed, 1 Jun 2016 01:16:19 +0000
(09:16 +0800)
committer
Ziyuan Xu
<xzy.xu@rock-chips.com>
Wed, 1 Jun 2016 01:25:57 +0000
(09:25 +0800)
Revise the value of macro which is belong to ctrl_base register.
Change-Id: Ic0943b233d4244dadf42d09343136aae012ac1b4
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
drivers/phy/phy-rockchip-emmc.c
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diff --git
a/drivers/phy/phy-rockchip-emmc.c
b/drivers/phy/phy-rockchip-emmc.c
index b0763d38dae8efefbbc5713bc0b38999a66af21f..2853e0e89bc019b1030ebcfcfa071f32f737a72b 100644
(file)
--- a/
drivers/phy/phy-rockchip-emmc.c
+++ b/
drivers/phy/phy-rockchip-emmc.c
@@
-43,8
+43,8
@@
#define CTRL_OFFSET 0x2c
#define CTRL_INTER_CLKEN 0x1
-#define CTRL_INTER_CLKRDY 0x
1
-#define CTRL_INTER_CLKOUT 0x
1
+#define CTRL_INTER_CLKRDY 0x
2
+#define CTRL_INTER_CLKOUT 0x
4
#define PHYCTRL_PDB_MASK 0x1
#define PHYCTRL_PDB_SHIFT 0x0
#define PHYCTRL_PDB_PWR_ON 0x1