[ARM] tegra: dma: fix a typo

Signed-off-by: Iliyan Malchev <malchev@google.com>

diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c
index c2bb582b96cda18befa7e3a78e1ef56eec0a7f5e..87309818d254701e247e06fea30e7b038fd8813c 100644 (file)
--- a/arch/arm/mach-tegra/dma.c
+++ b/arch/arm/mach-tegra/dma.c
@@ -242,7 +242,7 @@ int tegra_dma_dequeue_req(struct tegra_dma_channel *ch,
        if (status & STA_BUSY)
                req->bytes_transferred -= to_transfer;
 
-       /* In continous transfer mode, DMA only tracks the count of the
+       /* In continuous transfer mode, DMA only tracks the count of the
         * half DMA buffer. So, if the DMA already finished half the DMA
         * then add the half buffer to the completed count.
         *
@@ -250,7 +250,7 @@ int tegra_dma_dequeue_req(struct tegra_dma_channel *ch,
         *      dequue happens at the same time as the DMA just moved to
         *      the new buffer and SW didn't yet received the interrupt?
         */
-       if (ch->mode & TEGRA_DMA_MODE_CONTINOUS)
+       if (ch->mode & TEGRA_DMA_MODE_CONTINUOUS)
                if (req->buffer_status == TEGRA_DMA_REQ_BUF_STATUS_HALF_FULL)
                        req->bytes_transferred += req_transfer_count;
 

diff --git a/arch/arm/mach-tegra/include/mach/dma.h b/arch/arm/mach-tegra/include/mach/dma.h
index 39011bd9a925f547d190a51cb8db710553dc3772..81e62782bac7ceba74c5817b6dfc24e9975fe4f4 100644 (file)
--- a/arch/arm/mach-tegra/include/mach/dma.h
+++ b/arch/arm/mach-tegra/include/mach/dma.h
@@ -58,7 +58,7 @@ struct tegra_dma_channel;
 
 enum tegra_dma_mode {
        TEGRA_DMA_SHARED = 1,
-       TEGRA_DMA_MODE_CONTINOUS = 2,
+       TEGRA_DMA_MODE_CONTINUOUS = 2,
        TEGRA_DMA_MODE_ONESHOT = 4,
 };
 
@@ -92,11 +92,11 @@ struct tegra_dma_req {
        /*  This is a called from the DMA ISR context when the DMA is still in
         *  progress and is actively filling same buffer.
         *
-        *  In case of continous mode receive, this threshold is 1/2 the buffer
+        *  In case of continuous mode receive, this threshold is 1/2 the buffer
         *  size. In other cases, this will not even be called as there is no
         *  hardware support for it.
         *
-        * In the case of continous mode receive, if there is next req already
+        * In the case of continuous mode receive, if there is next req already
         * queued, DMA programs the HW to use that req when this req is
         * completed. If there is no "next req" queued, then DMA ISR doesn't do
         * anything before calling this callback.