In Thumb mode, the frame register must be R7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36512 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp
index 96c6d385f1baf24c6b6f034ab0bbe99be075714b..34c07d723cd10a9a386b655fc0041bd40e88558b 100644 (file)
--- a/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -85,7 +85,7 @@ ARMRegisterInfo::ARMRegisterInfo(const TargetInstrInfo &tii,
                                  const ARMSubtarget &sti)
   : ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP),
     TII(tii), STI(sti),
-    FramePtr(STI.useThumbBacktraces() ? ARM::R7 : ARM::R11) {
+    FramePtr(STI.useThumbBacktraces() || STI.isThumb() ? ARM::R7 : ARM::R11) {
 }
 
 bool ARMRegisterInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
@@ -1472,7 +1472,7 @@ unsigned ARMRegisterInfo::getRARegister() const {
 
 unsigned ARMRegisterInfo::getFrameRegister(MachineFunction &MF) const {
   if (STI.isTargetDarwin() || hasFP(MF))
-    return STI.useThumbBacktraces() ? ARM::R7 : ARM::R11;
+    return STI.useThumbBacktraces() || STI.isThumb() ? ARM::R7 : ARM::R11;
   else
     return ARM::SP;
 }

diff --git a/test/CodeGen/ARM/frame_thumb.ll b/test/CodeGen/ARM/frame_thumb.ll
new file mode 100644 (file)
index 0000000..fe82db9
--- /dev/null
+++ b/test/CodeGen/ARM/frame_thumb.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -march=thumb -mtriple=arm-apple-darwin \
+; RUN:     -disable-fp-elim | not grep {r11}
+; RUN: llvm-as < %s | llc -march=thumb -mtriple=arm-linux-gnueabi \
+; RUN:     -disable-fp-elim | not grep {r11}
+
+define i32 @f() {
+entry:
+       ret i32 10
+}