Fix decoding tests for fixed MSR encodings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142624 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt
index 69a094dd681c336d13ed3a1114229f7ab581baa5..36627a3488183bc0096612522890ad10b04c2725 100644 (file)
--- a/test/MC/Disassembler/ARM/arm-tests.txt
+++ b/test/MC/Disassembler/ARM/arm-tests.txt
@@ -161,12 +161,6 @@
 # CHECK: cpsie if, #10
 0xca 0x00 0x0a 0xf1
 
-# CHECK: msr CPSR_fc, r0
-0x00 0xf0 0x29 0xe1
-
-# CHECK:       msrmi   CPSR_c, #4043309056
-0xf1 0xf4 0x21 0x43
-
 # CHECK: rsbs r6, r7, r8
 0x08 0x60 0x77 0xe0
 

diff --git a/test/MC/Disassembler/ARM/basic-arm-instructions.txt b/test/MC/Disassembler/ARM/basic-arm-instructions.txt
index fc7eda537aba2ac282098485f200e715d09a60a1..06aa8f756daa4b7ef105729a54a58a55134be1b3 100644 (file)
--- a/test/MC/Disassembler/ARM/basic-arm-instructions.txt
+++ b/test/MC/Disassembler/ARM/basic-arm-instructions.txt
@@ -744,65 +744,21 @@
 # MSR
 #------------------------------------------------------------------------------
 
-# CHECK: msr  CPSR_fc, #5
-# CHECK: msr  APSR_g, #5
-# CHECK: msr  APSR_nzcvq, #5
-# CHECK: msr  APSR_nzcvq, #5
-# CHECK: msr  APSR_nzcvqg, #5
-# CHECK: msr  CPSR_fc, #5
 # CHECK: msr  CPSR_c, #5
 # CHECK: msr  CPSR_x, #5
-# CHECK: msr  CPSR_fc, #5
-# CHECK: msr  CPSR_fc, #5
-# CHECK: msr  CPSR_fsx, #5
-# CHECK: msr  SPSR_fc, #5
-# CHECK: msr  SPSR_fsxc, #5
-# CHECK: msr  CPSR_fsxc, #5
-
-0x05 0xf0 0x29 0xe3
+# CHECK: msr  CPSR_xc, #5
+
 0x05 0xf0 0x24 0xe3
 0x05 0xf0 0x28 0xe3
-0x05 0xf0 0x28 0xe3
 0x05 0xf0 0x2c 0xe3
-0x05 0xf0 0x29 0xe3
-0x05 0xf0 0x21 0xe3
-0x05 0xf0 0x22 0xe3
-0x05 0xf0 0x29 0xe3
-0x05 0xf0 0x29 0xe3
-0x05 0xf0 0x2e 0xe3
-0x05 0xf0 0x69 0xe3
-0x05 0xf0 0x6f 0xe3
-0x05 0xf0 0x2f 0xe3
-
-# CHECK: msr  CPSR_fc, r0
-# CHECK: msr  APSR_g, r0
-# CHECK: msr  APSR_nzcvq, r0
-# CHECK: msr  APSR_nzcvq, r0
-# CHECK: msr  APSR_nzcvqg, r0
-# CHECK: msr  CPSR_fc, r0
+
 # CHECK: msr  CPSR_c, r0
 # CHECK: msr  CPSR_x, r0
-# CHECK: msr  CPSR_fc, r0
-# CHECK: msr  CPSR_fc, r0
-# CHECK: msr  CPSR_fsx, r0
-# CHECK: msr  SPSR_fc, r0
-# CHECK: msr  SPSR_fsxc, r0
-# CHECK: msr  CPSR_fsxc, r0
-
-0x00 0xf0 0x29 0xe1
+# CHECK: msr  CPSR_xc, r0
+
 0x00 0xf0 0x24 0xe1
 0x00 0xf0 0x28 0xe1
-0x00 0xf0 0x28 0xe1
 0x00 0xf0 0x2c 0xe1
-0x00 0xf0 0x29 0xe1
-0x00 0xf0 0x21 0xe1
-0x00 0xf0 0x22 0xe1
-0x00 0xf0 0x29 0xe1
-0x00 0xf0 0x29 0xe1
-0x00 0xf0 0x2e 0xe1
-0x00 0xf0 0x69 0xe1
-0x00 0xf0 0x6f 0xe1
-0x00 0xf0 0x2f 0xe1
 
 #------------------------------------------------------------------------------
 # MUL