ARM: tegra30: common: enable csite clock

Enable csite (debug and trace controller) clock at init to prevent it
be disabled. And this also the necessary clock for CPU be brought up or
resumed from a power-gating low power state.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 3e03e5f15c146cbbe96134fa549724c21a648672..203a8b94863b225ab15503a949b805852ff702ad 100644 (file)
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -108,6 +108,7 @@ static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {
        { "sclk",       "pll_p_out4",   102000000,      true },
        { "hclk",       "sclk",         102000000,      true },
        { "pclk",       "hclk",         51000000,       true },
+       { "csite",      NULL,           0,              true },
        { NULL,         NULL,           0,              0},
 };
 #endif