usb: musb: AM35x: moving internal phy functions out of usb_musb.c file
authorHema HK <hemahk@ti.com>
Wed, 16 Feb 2011 12:04:40 +0000 (17:34 +0530)
committerFelipe Balbi <balbi@ti.com>
Thu, 17 Feb 2011 15:35:53 +0000 (17:35 +0200)
Moved all the board specific internal PHY functions out of usb_musb.c file
as this file is shared between the OMAP2+ and AM35xx platforms.
There exists a file which has the functions specific to internal PHY
used for OMAP4 platform. Moved all phy specific functions to this file
and passing these functions through board data in the board file.

Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
arch/arm/mach-omap2/Makefile
arch/arm/mach-omap2/board-am3517evm.c
arch/arm/mach-omap2/omap_phy_internal.c
arch/arm/mach-omap2/usb-musb.c
arch/arm/plat-omap/include/plat/usb.h

index 1c0c2b02d870b74a814c4d92a4d70e6de9f79748..43d4e14d0ec93ee7bd38944e1a57114a839f8306 100644 (file)
@@ -218,7 +218,8 @@ obj-$(CONFIG_MACH_OMAP4_PANDA)              += board-omap4panda.o \
                                           hsmmc.o \
                                           omap_phy_internal.o
 
-obj-$(CONFIG_MACH_OMAP3517EVM)         += board-am3517evm.o
+obj-$(CONFIG_MACH_OMAP3517EVM)         += board-am3517evm.o \
+                                          omap_phy_internal.o \
 
 obj-$(CONFIG_MACH_CRANEBOARD)          += board-am3517crane.o
 
index 10d60b7743cfa1a0b59c7ef75dacc9cd2de9532b..3413bf993c7dcc41bb84239945ca021d800f340e 100644 (file)
@@ -409,6 +409,10 @@ static struct omap_musb_board_data musb_board_data = {
        .interface_type         = MUSB_INTERFACE_ULPI,
        .mode                   = MUSB_OTG,
        .power                  = 500,
+       .set_phy_power          = am35x_musb_phy_power,
+       .clear_irq              = am35x_musb_clear_irq,
+       .set_mode               = am35x_musb_set_mode,
+       .reset                  = am35x_musb_reset,
 };
 
 static __init void am3517_evm_musb_init(void)
index 745252c60e320c00757aafe557583a9b7c503bc3..f172ec06c06ab69b3a0bb3bd45b0a54974d571c5 100644 (file)
@@ -29,6 +29,7 @@
 #include <linux/usb.h>
 
 #include <plat/usb.h>
+#include "control.h"
 
 /* OMAP control module register for UTMI PHY */
 #define CONTROL_DEV_CONF               0x300
@@ -147,3 +148,95 @@ int omap4430_phy_exit(struct device *dev)
 
        return 0;
 }
+
+void am35x_musb_reset(void)
+{
+       u32     regval;
+
+       /* Reset the musb interface */
+       regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
+
+       regval |= AM35XX_USBOTGSS_SW_RST;
+       omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
+
+       regval &= ~AM35XX_USBOTGSS_SW_RST;
+       omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
+
+       regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
+}
+
+void am35x_musb_phy_power(u8 on)
+{
+       unsigned long timeout = jiffies + msecs_to_jiffies(100);
+       u32 devconf2;
+
+       if (on) {
+               /*
+                * Start the on-chip PHY and its PLL.
+                */
+               devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
+
+               devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN);
+               devconf2 |= CONF2_PHY_PLLON;
+
+               omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
+
+               pr_info(KERN_INFO "Waiting for PHY clock good...\n");
+               while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2)
+                               & CONF2_PHYCLKGD)) {
+                       cpu_relax();
+
+                       if (time_after(jiffies, timeout)) {
+                               pr_err(KERN_ERR "musb PHY clock good timed out\n");
+                               break;
+                       }
+               }
+       } else {
+               /*
+                * Power down the on-chip PHY.
+                */
+               devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
+
+               devconf2 &= ~CONF2_PHY_PLLON;
+               devconf2 |=  CONF2_PHYPWRDN | CONF2_OTGPWRDN;
+               omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
+       }
+}
+
+void am35x_musb_clear_irq(void)
+{
+       u32 regval;
+
+       regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
+       regval |= AM35XX_USBOTGSS_INT_CLR;
+       omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
+       regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
+}
+
+void am35x_musb_set_mode(u8 musb_mode)
+{
+       u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
+
+       devconf2 &= ~CONF2_OTGMODE;
+       switch (musb_mode) {
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+       case MUSB_HOST:         /* Force VBUS valid, ID = 0 */
+               devconf2 |= CONF2_FORCE_HOST;
+               break;
+#endif
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+       case MUSB_PERIPHERAL:   /* Force VBUS valid, ID = 1 */
+               devconf2 |= CONF2_FORCE_DEVICE;
+               break;
+#endif
+#ifdef CONFIG_USB_MUSB_OTG
+       case MUSB_OTG:          /* Don't override the VBUS/ID comparators */
+               devconf2 |= CONF2_NO_OVERRIDE;
+               break;
+#endif
+       default:
+               pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode);
+       }
+
+       omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
+}
index 5298949d4b110a9303826e7655ed3d13bbee4e97..9107883287f6fe0cf5666982c37bb5b604953702 100644 (file)
 #include <mach/irqs.h>
 #include <mach/am35xx.h>
 #include <plat/usb.h>
-#include "control.h"
 
 #if defined(CONFIG_USB_MUSB_OMAP2PLUS) || defined (CONFIG_USB_MUSB_AM35X)
 
-static void am35x_musb_reset(void)
-{
-       u32     regval;
-
-       /* Reset the musb interface */
-       regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
-
-       regval |= AM35XX_USBOTGSS_SW_RST;
-       omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
-
-       regval &= ~AM35XX_USBOTGSS_SW_RST;
-       omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
-
-       regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
-}
-
-static void am35x_musb_phy_power(u8 on)
-{
-       unsigned long timeout = jiffies + msecs_to_jiffies(100);
-       u32 devconf2;
-
-       if (on) {
-               /*
-                * Start the on-chip PHY and its PLL.
-                */
-               devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
-
-               devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN);
-               devconf2 |= CONF2_PHY_PLLON;
-
-               omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
-
-               pr_info(KERN_INFO "Waiting for PHY clock good...\n");
-               while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2)
-                               & CONF2_PHYCLKGD)) {
-                       cpu_relax();
-
-                       if (time_after(jiffies, timeout)) {
-                               pr_err(KERN_ERR "musb PHY clock good timed out\n");
-                               break;
-                       }
-               }
-       } else {
-               /*
-                * Power down the on-chip PHY.
-                */
-               devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
-
-               devconf2 &= ~CONF2_PHY_PLLON;
-               devconf2 |=  CONF2_PHYPWRDN | CONF2_OTGPWRDN;
-               omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
-       }
-}
-
-static void am35x_musb_clear_irq(void)
-{
-       u32 regval;
-
-       regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
-       regval |= AM35XX_USBOTGSS_INT_CLR;
-       omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
-       regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
-}
-
-static void am35x_musb_set_mode(u8 musb_mode)
-{
-       u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
-
-       devconf2 &= ~CONF2_OTGMODE;
-       switch (musb_mode) {
-#ifdef CONFIG_USB_MUSB_HDRC_HCD
-       case MUSB_HOST:         /* Force VBUS valid, ID = 0 */
-               devconf2 |= CONF2_FORCE_HOST;
-               break;
-#endif
-#ifdef CONFIG_USB_GADGET_MUSB_HDRC
-       case MUSB_PERIPHERAL:   /* Force VBUS valid, ID = 1 */
-               devconf2 |= CONF2_FORCE_DEVICE;
-               break;
-#endif
-#ifdef CONFIG_USB_MUSB_OTG
-       case MUSB_OTG:          /* Don't override the VBUS/ID comparators */
-               devconf2 |= CONF2_NO_OVERRIDE;
-               break;
-#endif
-       default:
-               pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode);
-       }
-
-       omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
-}
-
 static struct resource musb_resources[] = {
        [0] = { /* start and end set dynamically */
                .flags  = IORESOURCE_MEM,
@@ -189,10 +96,6 @@ void __init usb_musb_init(struct omap_musb_board_data *board_data)
                musb_device.name = "musb-am35x";
                musb_resources[0].start = AM35XX_IPSS_USBOTGSS_BASE;
                musb_resources[1].start = INT_35XX_USBOTG_IRQ;
-               board_data->set_phy_power = am35x_musb_phy_power;
-               board_data->clear_irq = am35x_musb_clear_irq;
-               board_data->set_mode = am35x_musb_set_mode;
-               board_data->reset = am35x_musb_reset;
        } else if (cpu_is_omap34xx()) {
                musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE;
        } else if (cpu_is_omap44xx()) {
index 450a332f1009f58286c60072c4673f33b00c005c..077192759afc49384c219125e591cd7af9639856 100644 (file)
@@ -91,6 +91,10 @@ extern int omap4430_phy_exit(struct device *dev);
 
 #endif
 
+extern void am35x_musb_reset(void);
+extern void am35x_musb_phy_power(u8 on);
+extern void am35x_musb_clear_irq(void);
+extern void am35x_musb_set_mode(u8 musb_mode);
 
 /*
  * FIXME correct answer depends on hmc_mode,