EVT VT = EVT::getEVT(I.getType());
+ if (I.getAlignment() * 8 != VT.getSizeInBits())
+ report_fatal_error("Cannot generate unaligned atomic load");
+
SDValue L =
DAG.getAtomic(ISD::ATOMIC_LOAD, dl, VT, VT, InChain,
getValue(I.getPointerOperand()),
SDValue InChain = getRoot();
+ EVT VT = EVT::getEVT(I.getValueOperand()->getType());
+
+ if (I.getAlignment() * 8 != VT.getSizeInBits())
+ report_fatal_error("Cannot generate unaligned atomic store");
+
if (TLI.getInsertFencesForAtomic())
InChain = InsertFenceForAtomic(InChain, Order, Scope, true, dl,
DAG, TLI);
SDValue OutChain =
- DAG.getAtomic(ISD::ATOMIC_STORE, dl,
- getValue(I.getValueOperand()).getValueType().getSimpleVT(),
+ DAG.getAtomic(ISD::ATOMIC_STORE, dl, VT,
InChain,
getValue(I.getPointerOperand()),
getValue(I.getValueOperand()),
; CHECK: test1
; CHECK: cmpxchg8b
; CHECK-NEXT: jne
- store atomic i64 %val1, i64* %ptr seq_cst, align 4
+ store atomic i64 %val1, i64* %ptr seq_cst, align 8
ret void
}
define i64 @test2(i64* %ptr) {
; CHECK: test2
; CHECK: cmpxchg8b
- %val = load atomic i64* %ptr seq_cst, align 4
+ %val = load atomic i64* %ptr seq_cst, align 8
ret i64 %val
}