Builder->getInt(RHSV ^ NotSignBit));
}
}
+
+ // (icmp ugt (xor X, C), ~C) -> (icmp ult X, C)
+ // iff -C is a power of 2
+ if (ICI.getPredicate() == ICmpInst::ICMP_UGT &&
+ XorCST->getValue() == ~RHSV && (RHSV + 1).isPowerOf2())
+ return new ICmpInst(ICmpInst::ICMP_ULT, LHSI->getOperand(0), XorCST);
+
+ // (icmp ult (xor X, C), -C) -> (icmp uge X, C)
+ // iff -C is a power of 2
+ if (ICI.getPredicate() == ICmpInst::ICMP_ULT &&
+ XorCST->getValue() == -RHSV && RHSV.isPowerOf2())
+ return new ICmpInst(ICmpInst::ICMP_UGE, LHSI->getOperand(0), XorCST);
}
break;
case Instruction::And: // (icmp pred (and X, AndCST), RHS)
%cmp = icmp ne i32 %and, -16
ret i1 %cmp
}
+
+; CHECK: @icmp_sub_-1_X_ult_4
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ugt i32 %X, -5
+; CHECK-NEXT: ret i1 [[CMP]]
+define i1 @icmp_sub_-1_X_ult_4(i32 %X) {
+ %sub = sub i32 -1, %X
+ %cmp = icmp ult i32 %sub, 4
+ ret i1 %cmp
+}
+
+; CHECK: @icmp_sub_-1_X_uge_4
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ult i32 %X, -4
+; CHECK-NEXT: ret i1 [[CMP]]
+define i1 @icmp_sub_-1_X_uge_4(i32 %X) {
+ %sub = sub i32 -1, %X
+ %cmp = icmp uge i32 %sub, 4
+ ret i1 %cmp
+}