From: Akira Hatanaka <ahatanak@gmail.com>
Date: Fri, 9 Sep 2011 01:13:27 +0000 (+0000)
Subject: Change default target architecture from Mips1 to Mips32r1 in preparation for
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;ds=inline;h=ad5f0c9e736ac081089f98fafce974dfe0c584de;p=oota-llvm.git

Change default target architecture from Mips1 to Mips32r1 in preparation for
removing support for Mips1 and Mips2.

This change and the ones that follow have been discussed with and approved by
Bruno.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139344 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/Mips/Mips.td b/lib/Target/Mips/Mips.td
index 433cd57f34e..4087c82d7e6 100644
--- a/lib/Target/Mips/Mips.td
+++ b/lib/Target/Mips/Mips.td
@@ -79,6 +79,7 @@ def : Proc<"r3000", [FeatureMips1]>;
 def : Proc<"mips2", [FeatureMips2]>;
 def : Proc<"r6000", [FeatureMips2]>;
 
+def : Proc<"mips32r1", [FeatureMips32]>;
 def : Proc<"4ke", [FeatureMips32r2]>;
 
 // Allegrex is a 32bit subset of r4000, both for integer and fp registers,
diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp
index c273d0a2cd7..dd115fdecf9 100644
--- a/lib/Target/Mips/MipsSubtarget.cpp
+++ b/lib/Target/Mips/MipsSubtarget.cpp
@@ -31,8 +31,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
 {
   std::string CPUName = CPU;
   if (CPUName.empty())
-    CPUName = "mips1";
-  MipsArchVersion = Mips1;
+    CPUName = "mips32r1";
 
   // Parse features string.
   ParseSubtargetFeatures(CPUName, FS);
diff --git a/test/CodeGen/Mips/2010-07-20-Select.ll b/test/CodeGen/Mips/2010-07-20-Select.ll
index e5e2c547377..31e56ff27d1 100644
--- a/test/CodeGen/Mips/2010-07-20-Select.ll
+++ b/test/CodeGen/Mips/2010-07-20-Select.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=mips -relocation-model=static | FileCheck %s
-; RUN: llc < %s -march=mips -relocation-model=static -regalloc=basic | FileCheck %s
+; RUN: llc < %s -march=mips -relocation-model=static -mcpu=mips1 | FileCheck %s
+; RUN: llc < %s -march=mips -relocation-model=static -regalloc=basic -mcpu=mips1 | FileCheck %s
 ; Fix PR7473
 
 define i32 @main() nounwind readnone {
diff --git a/test/CodeGen/Mips/fpcmp.ll b/test/CodeGen/Mips/fpcmp.ll
index c89ffe67f1b..24de2ffd638 100644
--- a/test/CodeGen/Mips/fpcmp.ll
+++ b/test/CodeGen/Mips/fpcmp.ll
@@ -1,5 +1,5 @@
 ; RUN: llc  < %s -march=mipsel -mcpu=4ke | FileCheck %s -check-prefix=CHECK-MIPS32R2
-; RUN: llc  < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-MIPS1
+; RUN: llc  < %s -march=mipsel -mcpu=mips1 | FileCheck %s -check-prefix=CHECK-MIPS1
 
 @g1 = external global i32
 
diff --git a/test/CodeGen/Mips/mips1f64ldst.ll b/test/CodeGen/Mips/mips1f64ldst.ll
index 1860755634c..28683be7434 100644
--- a/test/CodeGen/Mips/mips1f64ldst.ll
+++ b/test/CodeGen/Mips/mips1f64ldst.ll
@@ -1,5 +1,5 @@
-; RUN: llc  < %s -march=mipsel  | FileCheck %s -check-prefix=CHECK-EL
-; RUN: llc  < %s -march=mips  | FileCheck %s -check-prefix=CHECK-EB
+; RUN: llc  < %s -march=mipsel -mcpu=mips1 | FileCheck %s -check-prefix=CHECK-EL
+; RUN: llc  < %s -march=mips -mcpu=mips1 | FileCheck %s -check-prefix=CHECK-EB
 
 @g1 = common global double 0.000000e+00, align 8
 @g2 = common global double 0.000000e+00, align 8
diff --git a/test/CodeGen/Mips/select.ll b/test/CodeGen/Mips/select.ll
index 3ea4c4b2e33..623c2a3e556 100644
--- a/test/CodeGen/Mips/select.ll
+++ b/test/CodeGen/Mips/select.ll
@@ -1,5 +1,5 @@
 ; RUN: llc  < %s -march=mipsel -mcpu=4ke | FileCheck %s -check-prefix=CHECK-MIPS32R2
-; RUN: llc  < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-MIPS1
+; RUN: llc  < %s -march=mipsel -mcpu=mips1 | FileCheck %s -check-prefix=CHECK-MIPS1
 
 @d2 = external global double
 @d3 = external global double