From: chenxing Date: Thu, 26 Sep 2013 04:09:27 +0000 (+0800) Subject: rk3026: add efuse support X-Git-Tag: firefly_0821_release~6602 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=018dd2c26fc77bb1c0c77d1475f4140139a83ecf;p=firefly-linux-kernel-4.4.55.git rk3026: add efuse support --- diff --git a/arch/arm/mach-rk2928/include/mach/io.h b/arch/arm/mach-rk2928/include/mach/io.h index 6ed2a61a4cba..7f49841a92ae 100755 --- a/arch/arm/mach-rk2928/include/mach/io.h +++ b/arch/arm/mach-rk2928/include/mach/io.h @@ -183,6 +183,7 @@ #define RK2928_EFUSE_PHYS 0x20090000 #define RK2928_EFUSE_SIZE SZ_4K +#define RK2928_EFUSE_BASE RK2928_IO_TO_VIRT1(RK2928_EFUSE_PHYS) #define GIC_CPU_BASE RK2928_GICC_BASE #define GIC_DIST_BASE RK2928_GICD_BASE diff --git a/arch/arm/mach-rk2928/io.c b/arch/arm/mach-rk2928/io.c index 900b12adc0ad..c45dd64f2cbf 100755 --- a/arch/arm/mach-rk2928/io.c +++ b/arch/arm/mach-rk2928/io.c @@ -51,6 +51,7 @@ static struct map_desc rk2928_io_desc[] __initdata = { RK2928_DEVICE(DDR_PHY), RK2928_DEVICE(RKI2C0), RK2928_DEVICE(RKI2C1), + RK2928_DEVICE(EFUSE), }; void __init rk2928_map_common_io(void) diff --git a/arch/arm/mach-rk3026/clock_data.c b/arch/arm/mach-rk3026/clock_data.c index 94c4ccd566ab..4b979a70fbb5 100755 --- a/arch/arm/mach-rk3026/clock_data.c +++ b/arch/arm/mach-rk3026/clock_data.c @@ -2879,6 +2879,7 @@ static void __init rk2928_clock_common_init(unsigned long gpll_rate, unsigned lo //rk_dump_clock_info(); } +#include void __init _rk2928_clock_data_init(unsigned long gpll, unsigned long cpll, int flags) { struct clk_lookup *clk; @@ -2895,6 +2896,8 @@ void __init _rk2928_clock_data_init(unsigned long gpll, unsigned long cpll, int clk_register(clk->clk); } + rk_efuse_init(); + CLKDATA_DBG("clk_recalculate_root_clocks_nolock\n"); div_clk_for_pll_init(); clk_recalculate_root_clocks_nolock(); diff --git a/arch/arm/plat-rk/efuse.c b/arch/arm/plat-rk/efuse.c index 8584964f60d8..c4fe7b9610f8 100644 --- a/arch/arm/plat-rk/efuse.c +++ b/arch/arm/plat-rk/efuse.c @@ -17,6 +17,11 @@ #define efuse_writel(val, offset) writel_relaxed(val, RK30_EFUSE_BASE + offset) #endif +#if defined(CONFIG_ARCH_RK3026) +#define efuse_readl(offset) readl_relaxed(RK2928_EFUSE_BASE + offset) +#define efuse_writel(val, offset) writel_relaxed(val, RK2928_EFUSE_BASE + offset) +#endif + u8 efuse_buf[32 + 1] = {0, 0}; static int efuse_readregs(u32 addr, u32 length, u8 *buf) @@ -59,7 +64,38 @@ static int efuse_readregs(u32 addr, u32 length, u8 *buf) void rk_efuse_init(void) { +#if defined(CONFIG_ARCH_RK3026) + u8 tmp_buf[32]; + int i, j, err = 0; + + efuse_readregs(0x0, 32, efuse_buf); + + /* + * i = 10, need time = 2,860,875 ns + * i = 100, need time = 27,327,000 ns + */ + for (i = 0; i < 10; i++){ + efuse_readregs(0x0, 32, tmp_buf); + for (j = 0; j < 32; j++){ + if (efuse_buf[j] != tmp_buf[j]){ + printk(KERN_WARNING ":%s:rk3026 efuse bit err\n", __func__); + efuse_readregs(0x0, 32, efuse_buf); + i = 0; + err++; + break; + } + } + + if (err >= 500) { + printk(KERN_ERR "%s:rk3026 get efuse err\n", __func__); + efuse_buf[5] = 0x00; /* set default SOC version */ + efuse_buf[22] = 0x00; /* clean msg about leakage */ + break; + } + } +#else efuse_readregs(0x0, 32, efuse_buf); +#endif } int rk_pll_flag(void) @@ -89,3 +125,8 @@ int rk3028_version_val(void) { return efuse_buf[5]; } + +int rk3026_version_val(void) +{ + return efuse_buf[5]; +} diff --git a/arch/arm/plat-rk/include/plat/efuse.h b/arch/arm/plat-rk/include/plat/efuse.h index 9583cc363c6a..bd7bf24897d0 100644 --- a/arch/arm/plat-rk/include/plat/efuse.h +++ b/arch/arm/plat-rk/include/plat/efuse.h @@ -4,7 +4,11 @@ #include /* eFuse controller register */ +#if defined(CONFIG_ARCH_RK3026) +#define EFUSE_A_SHIFT (8) +#else #define EFUSE_A_SHIFT (6) +#endif #define EFUSE_A_MASK (0xFF) //#define EFUSE_PD (1 << 5) //#define EFUSE_PS (1 << 4) @@ -22,5 +26,6 @@ int rk_pll_flag(void); int rk_tflag(void); int rk_leakage_val(void); int rk3028_version_val(void); +int rk3026_version_val(void); #endif