From: Eric Christopher <echristo@apple.com>
Date: Thu, 10 May 2012 21:48:22 +0000 (+0000)
Subject: Add support for the 'X' inline asm operand modifier.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=05b7a50210c1ebdd88fd7799c3d32b8fe1a0ce29;p=oota-llvm.git

Add support for the 'X' inline asm operand modifier.

Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156577 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/Mips/MipsAsmPrinter.cpp b/lib/Target/Mips/MipsAsmPrinter.cpp
index 33337383a0b..65dd6e95873 100644
--- a/lib/Target/Mips/MipsAsmPrinter.cpp
+++ b/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -382,14 +382,26 @@ bool MipsAsmPrinter::isBlockOnlyReachableByFallthrough(const MachineBasicBlock*
 }
 
 // Print out an operand for an inline asm expression.
-bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
+bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
                                      unsigned AsmVariant,const char *ExtraCode,
                                      raw_ostream &O) {
   // Does this asm operand have a single letter operand modifier?
-  if (ExtraCode && ExtraCode[0])
-    return true; // Unknown modifier.
+  if (ExtraCode && ExtraCode[0]) {
+    if (ExtraCode[1] != 0) return true; // Unknown modifier.
+
+    const MachineOperand &MO = MI->getOperand(OpNum);
+    switch (ExtraCode[0]) {
+      default:
+        return true;  // Unknown modifier.
+      case 'X': // hex const int
+        if ((MO.getType()) != MachineOperand::MO_Immediate)
+          return true;
+        O << "0x" << StringRef(utohexstr(MO.getImm())).lower();
+        return false;
+    }
+  }
 
-  printOperand(MI, OpNo, O);
+  printOperand(MI, OpNum, O);
   return false;
 }
 
diff --git a/test/CodeGen/Mips/inlineasm-operand-code.ll b/test/CodeGen/Mips/inlineasm-operand-code.ll
new file mode 100644
index 00000000000..4568a846585
--- /dev/null
+++ b/test/CodeGen/Mips/inlineasm-operand-code.ll
@@ -0,0 +1,15 @@
+; Positive test for inline register constraints
+;
+; RUN: llc -march=mipsel < %s  | FileCheck %s
+
+define i32 @main() nounwind {
+entry:
+
+; X with -3
+;CHECK:	#APP
+;CHECK:	addi ${{[0-9]+}},${{[0-9]+}},0xfffffffffffffffd
+;CHECK:	#NO_APP
+  tail call i32 asm sideeffect "addi $0,$1,${2:X}", "=r,r,I"(i32 7, i32 -3) nounwind
+
+  ret i32 0
+}