From: Evan Cheng <evan.cheng@apple.com>
Date: Fri, 6 Jul 2007 23:22:46 +0000 (+0000)
Subject: Do away with ImmutablePredicateOperand.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=06aae67b8315aa915f55abd5927453dbe8b11169;p=oota-llvm.git

Do away with ImmutablePredicateOperand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37961 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index c609ee6174d..6884e0001c8 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -288,7 +288,7 @@ def pred : PredicateOperand<OtherVT, (ops i32imm, CCR),
 
 // Conditional code operand for conditional branches and conditional moves.
 // No AlwaysVal value.
-def ccop : ImmutablePredicateOperand<OtherVT, (ops i32imm, CCR), (ops)> {
+def ccop : PredicateOperand<OtherVT, (ops i32imm, CCR), (ops)> {
   let PrintMethod = "printPredicateOperand";
 }
 
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 4ffde0a97fa..fe189784009 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -272,8 +272,8 @@ def memrix : Operand<iPTR> {   // memri where the imm is shifted 2 bits.
 
 // PowerPC Predicate operand.  20 = (0<<5)|20 = always, CR0 is a dummy reg
 // that doesn't matter.
-def pred : ImmutablePredicateOperand<OtherVT, (ops imm, CRRC),
-                                              (ops (i32 20), CR0)> {
+def pred : PredicateOperand<OtherVT, (ops imm, CRRC),
+                                     (ops (i32 20), CR0)> {
   let PrintMethod = "printPredicateOperand";
 }