From: Andrew Trick <atrick@apple.com>
Date: Wed, 21 Mar 2012 22:31:31 +0000 (+0000)
Subject: misched: tag a few XFAILs that I plan to fix
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=07269265b048b4781bc446a3a35e405e9fb71b29;p=oota-llvm.git

misched: tag a few XFAILs that I plan to fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153222 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/Generic/misched.ll b/test/CodeGen/Generic/misched.ll
deleted file mode 100644
index 9136b9c967f..00000000000
--- a/test/CodeGen/Generic/misched.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; RUN: true
-; llc -enable-misched -misched=shuffle -misched-bottomup < %s
-;
-; Interesting MachineScheduler cases.
-
-declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
-
-; From oggenc.
-; After coalescing, we have a dead superreg (RAX) definition.
-define fastcc void @_preextrapolate_helper() nounwind uwtable ssp {
-entry:
-  br i1 undef, label %for.cond.preheader, label %if.end
-
-for.cond.preheader:                               ; preds = %entry
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* null, i64 128, i32 4, i1 false) nounwind
-  unreachable
-
-if.end:                                           ; preds = %entry
-  ret void
-}
diff --git a/test/CodeGen/X86/lsr-reuse.ll b/test/CodeGen/X86/lsr-reuse.ll
index 527a5a60e86..1311a73fd32 100644
--- a/test/CodeGen/X86/lsr-reuse.ll
+++ b/test/CodeGen/X86/lsr-reuse.ll
@@ -1,4 +1,5 @@
 ; XFAIL: *
+; ...should pass. See PR12324: misched bringup
 ; RUN: llc < %s -march=x86-64 -O3 -asm-verbose=false | FileCheck %s
 target datalayout = "e-p:64:64:64"
 target triple = "x86_64-unknown-unknown"
diff --git a/test/CodeGen/X86/misched-new.ll b/test/CodeGen/X86/misched-new.ll
new file mode 100644
index 00000000000..f3c2af8f210
--- /dev/null
+++ b/test/CodeGen/X86/misched-new.ll
@@ -0,0 +1,25 @@
+; RUN: llc -march=x86-64 -mcpu=core2 -enable-misched -misched=shuffle -misched-bottomup < %s
+; XFAIL: *
+; ...should pass. See PR12324: misched bringup
+;
+; Interesting MachineScheduler cases.
+
+declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
+
+; From oggenc.
+; After coalescing, we have a dead superreg (RAX) definition.
+;
+; CHECK: xorl %esi, %esi
+; CHECK: movl $32, %ecx
+; CHECK: rep;movsl
+define fastcc void @_preextrapolate_helper() nounwind uwtable ssp {
+entry:
+  br i1 undef, label %for.cond.preheader, label %if.end
+
+for.cond.preheader:                               ; preds = %entry
+  call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* null, i64 128, i32 4, i1 false) nounwind
+  unreachable
+
+if.end:                                           ; preds = %entry
+  ret void
+}
diff --git a/test/CodeGen/X86/remat-scalar-zero.ll b/test/CodeGen/X86/remat-scalar-zero.ll
index f6f0ed10b51..75f438d26cd 100644
--- a/test/CodeGen/X86/remat-scalar-zero.ll
+++ b/test/CodeGen/X86/remat-scalar-zero.ll
@@ -1,4 +1,5 @@
 ; XFAIL: *
+; ...should pass. See PR12324: misched bringup
 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu > %t
 ; RUN: not grep xor %t
 ; RUN: not grep movap %t
diff --git a/test/CodeGen/X86/zext-sext.ll b/test/CodeGen/X86/zext-sext.ll
index cea9e9c854d..6432ae38ff3 100644
--- a/test/CodeGen/X86/zext-sext.ll
+++ b/test/CodeGen/X86/zext-sext.ll
@@ -1,4 +1,5 @@
 ; XFAIL: *
+; ...should pass. See PR12324: misched bringup
 ; RUN: llc < %s -march=x86-64 | FileCheck %s
 ; <rdar://problem/8006248>