From: Pawel Bylica <chfast@gmail.com>
Date: Thu, 2 Jul 2015 11:44:54 +0000 (+0000)
Subject: Reapply r240291: Fix shl folding in DAG combiner.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=074d71dea694f330cb6dc7b1c1392f65d57f154e;p=oota-llvm.git

Reapply r240291: Fix shl folding in DAG combiner.

The code responsible for shl folding in the DAGCombiner was assuming incorrectly that all constants are less than 64 bits. This patch simply changes the way values are compared.

It has been reverted previously because of some problems with comparing APInt with raw uint64_t. That has been fixed/changed with r241204.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241254 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 631f5852334..6056d93ddc7 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -4278,7 +4278,7 @@ SDValue DAGCombiner::visitSHL(SDNode *N) {
   if (isNullConstant(N0))
     return N0;
   // fold (shl x, c >= size(x)) -> undef
-  if (N1C && N1C->getZExtValue() >= OpSizeInBits)
+  if (N1C && N1C->getAPIntValue().uge(OpSizeInBits))
     return DAG.getUNDEF(VT);
   // fold (shl x, 0) -> x
   if (N1C && N1C->isNullValue())
diff --git a/test/CodeGen/X86/fold-vector-shl-crash.ll b/test/CodeGen/X86/fold-vector-shl-crash.ll
new file mode 100644
index 00000000000..9f81e44074f
--- /dev/null
+++ b/test/CodeGen/X86/fold-vector-shl-crash.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -march=x86    | FileCheck %s
+
+;CHECK-LABEL: test
+define <2 x i256> @test() {
+  %S = shufflevector <2 x i256> zeroinitializer, <2 x i256> <i256 -1, i256 -1>, <2 x i32> <i32 0, i32 2>
+  %B = shl <2 x i256> %S, <i256 -1, i256 -1> ; DAG Combiner crashes here
+  ret <2 x i256> %B
+}