From: Huang Jiachai <hjc@rock-chips.com>
Date: Wed, 19 Apr 2017 12:28:30 +0000 (+0800)
Subject: arm64: dts: rockchip: rk3368: add pinctrl for lvds ttl mode
X-Git-Tag: release-20171130_firefly~4^2~727
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=093600f249808caecdafbe7499f5a1c92a4e6f58;p=firefly-linux-kernel-4.4.55.git

arm64: dts: rockchip: rk3368: add pinctrl for lvds ttl mode

Change-Id: I5a6aa463142ccb6955c2380ca30795d2790e6124
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 9499d6c08e28..fda75aa9be95 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -2094,5 +2094,51 @@
 				rockchip,pins = <3 20 RK_FUNC_GPIO &pcfg_pull_none>;//ISP_FLASHTRIGOU
 			};
 		};
+
+		lcdc {
+			lcdc_lcdc: lcdc-lcdc {
+				rockchip,pins =
+					<0 14 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D10 */
+					<0 15 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D11 */
+					<0 16 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D12 */
+					<0 17 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D13 */
+					<0 18 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D14 */
+					<0 19 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D15 */
+					<0 20 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D16 */
+					<0 21 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D17 */
+					<0 22 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D18 */
+					<0 23 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D19 */
+					<0 24 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D20 */
+					<0 25 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D21 */
+					<0 26 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D22 */
+					<0 27 RK_FUNC_1 &pcfg_pull_none>,  /* LCDC_D23 */
+					<0 31 RK_FUNC_1 &pcfg_pull_none>,  /* DCLK */
+					<0 30 RK_FUNC_1 &pcfg_pull_none>,  /* DEN */
+					<0 28 RK_FUNC_1 &pcfg_pull_none>,  /* HSYNC */
+					<0 28 RK_FUNC_1 &pcfg_pull_none>;  /* VSYN */
+			};
+
+			lcdc_gpio: lcdc-gpio {
+				rockchip,pins =
+					<0 14 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D10 */
+					<0 15 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D11 */
+					<0 16 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D12 */
+					<0 17 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D13 */
+					<0 18 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D14 */
+					<0 19 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D15 */
+					<0 20 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D16 */
+					<0 21 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D17 */
+					<0 22 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D18 */
+					<0 23 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D19 */
+					<0 24 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D20 */
+					<0 25 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D21 */
+					<0 26 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D22 */
+					<0 27 RK_FUNC_GPIO &pcfg_pull_none>,  /* LCDC_D23 */
+					<0 31 RK_FUNC_GPIO &pcfg_pull_none>,  /* DCLK */
+					<0 30 RK_FUNC_GPIO &pcfg_pull_none>,  /* DEN */
+					<0 28 RK_FUNC_GPIO &pcfg_pull_none>,  /* HSYNC */
+					<0 29 RK_FUNC_GPIO &pcfg_pull_none>;  /* VSYN */
+			};
+		};
 	};
 };