From: Elaine Zhang Date: Thu, 31 Mar 2016 08:34:55 +0000 (+0800) Subject: ARM64: rockchip: rk3399: clk: fix i2c4 and i2c8 gate-register X-Git-Tag: firefly_0821_release~2919 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=0a58123e6e902de54b363daecf61d6a9069173ae;p=firefly-linux-kernel-4.4.55.git ARM64: rockchip: rk3399: clk: fix i2c4 and i2c8 gate-register Fix a typo making the sclk_i2c4 and sclk_i2c8 access a wrong register bit offset to handle its gate. Change-Id: I836244b8e14aa34ef44241c8ff24ebd6b63ed23a Signed-off-by: Elaine Zhang --- diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c index c8f80400e58c..b3f6b8cb6da8 100644 --- a/drivers/clk/rockchip/clk-rk3399.c +++ b/drivers/clk/rockchip/clk-rk3399.c @@ -1383,11 +1383,11 @@ static struct rockchip_clk_branch rk3399_clk_pmu_branches[] __initdata = { COMPOSITE_NOMUX(SCLK_I2C4_PMU, "clk_i2c4_pmu", "ppll", 0, RK3399_PMU_CLKSEL_CON(3), 0, 7, DFLAGS, - RK3399_PMU_CLKGATE_CON(0), 11, GFLAGS), + RK3399_PMU_CLKGATE_CON(0), 10, GFLAGS), COMPOSITE_NOMUX(SCLK_I2C8_PMU, "clk_i2c8_pmu", "ppll", 0, RK3399_PMU_CLKSEL_CON(2), 8, 7, DFLAGS, - RK3399_PMU_CLKGATE_CON(0), 10, GFLAGS), + RK3399_PMU_CLKGATE_CON(0), 11, GFLAGS), DIV(0, "clk_32k_suspend_pmu", "xin24m", CLK_IGNORE_UNUSED, RK3399_PMU_CLKSEL_CON(4), 0, 10, DFLAGS),