From: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Mon, 12 Jan 2015 22:07:46 +0000 (+0100)
Subject: Merge tag 'topic/i915-hda-componentized-2015-01-12' into drm-intel-next-queued
X-Git-Tag: firefly_0821_release~176^2~2312^2~32^2~24
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=0a87a2db485a1456b7427914969c0e8195a1bbda;p=firefly-linux-kernel-4.4.55.git

Merge tag 'topic/i915-hda-componentized-2015-01-12' into drm-intel-next-queued

Conflicts:
	drivers/gpu/drm/i915/intel_runtime_pm.c

Separate branch so that Takashi can also pull just this refactoring
into sound-next.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
---

0a87a2db485a1456b7427914969c0e8195a1bbda
diff --cc drivers/gpu/drm/i915/i915_gem.c
index 3f6ca46a1dfe,c11603b4cf1d..9f430f77a520
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@@ -1217,10 -1228,11 +1221,11 @@@ int __i915_wait_request(struct drm_i915
  
  	WARN(!intel_irqs_enabled(dev_priv), "IRQs disabled");
  
 -	if (i915_seqno_passed(ring->get_seqno(ring, true), seqno))
 +	if (i915_gem_request_completed(req, true))
  		return 0;
  
- 	timeout_expire = timeout ? jiffies + nsecs_to_jiffies((u64)*timeout) : 0;
+ 	timeout_expire = timeout ?
+ 		jiffies + nsecs_to_jiffies_timeout((u64)*timeout) : 0;
  
  	if (INTEL_INFO(dev)->gen >= 6 && ring->id == RCS && can_wait_boost(file_priv)) {
  		gen6_rps_boost(dev_priv);
diff --cc drivers/gpu/drm/i915/i915_reg.h
index 0cb0067af4bb,172de3b3433b..0f32fd1a9d10
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@@ -31,11 -31,20 +31,22 @@@
  #define _PORT(port, a, b) ((a) + (port)*((b)-(a)))
  #define _PIPE3(pipe, a, b, c) ((pipe) == PIPE_A ? (a) : \
  			       (pipe) == PIPE_B ? (b) : (c))
 +#define _PORT3(port, a, b, c) ((port) == PORT_A ? (a) : \
 +			       (port) == PORT_B ? (b) : (c))
  
- #define _MASKED_BIT_ENABLE(a) (((a) << 16) | (a))
- #define _MASKED_BIT_DISABLE(a) ((a) << 16)
+ #define _MASKED_FIELD(mask, value) ({					   \
+ 	if (__builtin_constant_p(mask))					   \
+ 		BUILD_BUG_ON_MSG(((mask) & 0xffff0000), "Incorrect mask"); \
+ 	if (__builtin_constant_p(value))				   \
+ 		BUILD_BUG_ON_MSG((value) & 0xffff0000, "Incorrect value"); \
+ 	if (__builtin_constant_p(mask) && __builtin_constant_p(value))	   \
+ 		BUILD_BUG_ON_MSG((value) & ~(mask),			   \
+ 				 "Incorrect value for mask");		   \
+ 	(mask) << 16 | (value); })
+ #define _MASKED_BIT_ENABLE(a)	({ typeof(a) _a = (a); _MASKED_FIELD(_a, _a); })
+ #define _MASKED_BIT_DISABLE(a)	(_MASKED_FIELD((a), 0))
+ 
+ 
  
  /* PCI config space */
  
diff --cc drivers/gpu/drm/i915/intel_drv.h
index 588b618ab668,e88fd5d12f05..1043a1e3a569
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@@ -873,8 -872,11 +873,10 @@@ void intel_fb_obj_flush(struct drm_i915
  void intel_init_audio(struct drm_device *dev);
  void intel_audio_codec_enable(struct intel_encoder *encoder);
  void intel_audio_codec_disable(struct intel_encoder *encoder);
+ void i915_audio_component_init(struct drm_i915_private *dev_priv);
+ void i915_audio_component_cleanup(struct drm_i915_private *dev_priv);
  
  /* intel_display.c */
 -const char *intel_output_name(int output);
  bool intel_has_pending_fb_unpin(struct drm_device *dev);
  int intel_pch_rawclk(struct drm_device *dev);
  void intel_mark_busy(struct drm_device *dev);
diff --cc drivers/gpu/drm/i915/intel_pm.c
index 091860432f01,964b28e3c630..3ba446a69ecd
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@@ -5970,12 -6716,8 +5980,12 @@@ static void haswell_init_clock_gating(s
  	 * to keep in mind (see 3DSTATE_PS and 3DSTATE_WM).
  	 */
  	I915_WRITE(GEN7_GT_MODE,
- 		   GEN6_WIZ_HASHING_MASK | GEN6_WIZ_HASHING_16x4);
+ 		   _MASKED_FIELD(GEN6_WIZ_HASHING_MASK, GEN6_WIZ_HASHING_16x4));
  
 +	/* WaSampleCChickenBitEnable:hsw */
 +	I915_WRITE(HALF_SLICE_CHICKEN3,
 +		   _MASKED_BIT_ENABLE(HSW_SAMPLE_C_PERFORMANCE));
 +
  	/* WaSwitchSolVfFArbitrationPriority:hsw */
  	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);
  
diff --cc drivers/gpu/drm/i915/intel_ringbuffer.c
index 3cad32a80108,c7bc93d28d84..12a36f0ca53d
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@@ -710,24 -703,8 +713,24 @@@ static int intel_ring_workarounds_emit(
  	return 0;
  }
  
 +static int intel_rcs_ctx_init(struct intel_engine_cs *ring,
 +			      struct intel_context *ctx)
 +{
 +	int ret;
 +
 +	ret = intel_ring_workarounds_emit(ring, ctx);
 +	if (ret != 0)
 +		return ret;
 +
 +	ret = i915_gem_render_state_init(ring);
 +	if (ret)
 +		DRM_ERROR("init render state: %d\n", ret);
 +
 +	return ret;
 +}
 +
  static int wa_add(struct drm_i915_private *dev_priv,
- 		  const u32 addr, const u32 val, const u32 mask)
+ 		  const u32 addr, const u32 mask, const u32 val)
  {
  	const u32 idx = dev_priv->workarounds.count;