From: 黄涛 <huangtao@rock-chips.com>
Date: Wed, 23 Jan 2013 13:40:34 +0000 (+0800)
Subject: rk3188: disable cpu axi init and ddr init temporily
X-Git-Tag: firefly_0821_release~7832
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=0b71f3b2c5b0a393b8923b0da6a54a0f63789f39;p=firefly-linux-kernel-4.4.55.git

rk3188: disable cpu axi init and ddr init temporily
---

diff --git a/arch/arm/mach-rk30/common.c b/arch/arm/mach-rk30/common.c
index d02027ad26fc..2822b581af15 100755
--- a/arch/arm/mach-rk30/common.c
+++ b/arch/arm/mach-rk30/common.c
@@ -22,6 +22,7 @@
 
 static void __init rk30_cpu_axi_init(void)
 {
+#ifndef CONFIG_ARCH_RK3188
 	writel_relaxed(0x0, RK30_CPU_AXI_BUS_BASE + 0x0088);	// cpu0
 	writel_relaxed(0x0, RK30_CPU_AXI_BUS_BASE + 0x0108);	// dmac1
 	writel_relaxed(0x0, RK30_CPU_AXI_BUS_BASE + 0x0188);	// cpu1r
@@ -43,6 +44,7 @@ static void __init rk30_cpu_axi_init(void)
 #endif
 	writel_relaxed(0x3f, RK30_CPU_AXI_BUS_BASE + 0x0014);	// memory scheduler read latency
 	dsb();
+#endif
 }
 
 static void __init rk30_io_drive_strength_init(void)
@@ -163,7 +165,9 @@ void __init rk30_map_io(void)
 	rk29_sram_init();
 	board_clock_init();
 	rk30_l2_cache_init();
+#ifndef CONFIG_ARCH_RK3188
 	ddr_init(DDR_TYPE, DDR_FREQ);
+#endif
 	clk_disable_unused();
 	rk30_iomux_init();
 	rk30_boot_mode_init();
@@ -171,6 +175,9 @@ void __init rk30_map_io(void)
 
 static __init u32 rk30_get_ddr_size(void)
 {
+#ifdef CONFIG_ARCH_RK3188
+	return SZ_2G;
+#endif
 	u32 size;
 	u32 v[3], a[3];
 	u32 pgtbl = PAGE_OFFSET + TEXT_OFFSET - 0x4000;