From: 黄涛 <huangtao@rock-chips.com>
Date: Sun, 6 Jan 2013 06:19:48 +0000 (+0800)
Subject: rk30: gpio: pin base linear
X-Git-Tag: firefly_0821_release~8003
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=11900c817ca9cda4036fc91aff33df3f4a091309;p=firefly-linux-kernel-4.4.55.git

rk30: gpio: pin base linear
---

diff --git a/arch/arm/mach-rk30/include/mach/gpio.h b/arch/arm/mach-rk30/include/mach/gpio.h
index d5ce06f12517..3b635dbb8793 100755
--- a/arch/arm/mach-rk30/include/mach/gpio.h
+++ b/arch/arm/mach-rk30/include/mach/gpio.h
@@ -19,7 +19,7 @@
 #define 	GPIO_LS_SYNC 		0x60
 
 #define NUM_GROUP				32
-#define MAX_BANK				6
+#define MAX_BANK				7
 
 #define PIN_BASE				NR_GIC_IRQS
 
@@ -239,22 +239,22 @@
 #define	RK30_PIN4_PD6		(4*NUM_GROUP + PIN_BASE + 30)
 #define	RK30_PIN4_PD7		(4*NUM_GROUP + PIN_BASE + 31)
 
-#define	RK30_PIN6_PA0		(5*NUM_GROUP + PIN_BASE + 0)
-#define	RK30_PIN6_PA1		(5*NUM_GROUP + PIN_BASE + 1)
-#define	RK30_PIN6_PA2		(5*NUM_GROUP + PIN_BASE + 2)
-#define	RK30_PIN6_PA3		(5*NUM_GROUP + PIN_BASE + 3)
-#define	RK30_PIN6_PA4		(5*NUM_GROUP + PIN_BASE + 4)
-#define	RK30_PIN6_PA5		(5*NUM_GROUP + PIN_BASE + 5)
-#define	RK30_PIN6_PA6		(5*NUM_GROUP + PIN_BASE + 6)
-#define	RK30_PIN6_PA7		(5*NUM_GROUP + PIN_BASE + 7)
-#define	RK30_PIN6_PB0		(5*NUM_GROUP + PIN_BASE + 8)
-#define	RK30_PIN6_PB1		(5*NUM_GROUP + PIN_BASE + 9)
-#define	RK30_PIN6_PB2		(5*NUM_GROUP + PIN_BASE + 10)
-#define	RK30_PIN6_PB3		(5*NUM_GROUP + PIN_BASE + 11)
-#define	RK30_PIN6_PB4		(5*NUM_GROUP + PIN_BASE + 12)
-#define	RK30_PIN6_PB5		(5*NUM_GROUP + PIN_BASE + 13)
-#define	RK30_PIN6_PB6		(5*NUM_GROUP + PIN_BASE + 14)
-#define	RK30_PIN6_PB7		(5*NUM_GROUP + PIN_BASE + 15)
+#define	RK30_PIN6_PA0		(6*NUM_GROUP + PIN_BASE + 0)
+#define	RK30_PIN6_PA1		(6*NUM_GROUP + PIN_BASE + 1)
+#define	RK30_PIN6_PA2		(6*NUM_GROUP + PIN_BASE + 2)
+#define	RK30_PIN6_PA3		(6*NUM_GROUP + PIN_BASE + 3)
+#define	RK30_PIN6_PA4		(6*NUM_GROUP + PIN_BASE + 4)
+#define	RK30_PIN6_PA5		(6*NUM_GROUP + PIN_BASE + 5)
+#define	RK30_PIN6_PA6		(6*NUM_GROUP + PIN_BASE + 6)
+#define	RK30_PIN6_PA7		(6*NUM_GROUP + PIN_BASE + 7)
+#define	RK30_PIN6_PB0		(6*NUM_GROUP + PIN_BASE + 8)
+#define	RK30_PIN6_PB1		(6*NUM_GROUP + PIN_BASE + 9)
+#define	RK30_PIN6_PB2		(6*NUM_GROUP + PIN_BASE + 10)
+#define	RK30_PIN6_PB3		(6*NUM_GROUP + PIN_BASE + 11)
+#define	RK30_PIN6_PB4		(6*NUM_GROUP + PIN_BASE + 12)
+#define	RK30_PIN6_PB5		(6*NUM_GROUP + PIN_BASE + 13)
+#define	RK30_PIN6_PB6		(6*NUM_GROUP + PIN_BASE + 14)
+#define	RK30_PIN6_PB7		(6*NUM_GROUP + PIN_BASE + 15)
 #endif
 
 #if defined(CONFIG_SPI_FPGA_GPIO)
diff --git a/arch/arm/mach-rk30/include/mach/irqs.h b/arch/arm/mach-rk30/include/mach/irqs.h
index 429023bf564c..73f6f10f5f80 100644
--- a/arch/arm/mach-rk30/include/mach/irqs.h
+++ b/arch/arm/mach-rk30/include/mach/irqs.h
@@ -95,7 +95,7 @@
 #define IRQ_ARM_PMU                     RK30XX_IRQ(103)
 
 #define NR_GIC_IRQS                     (5 * 32)
-#define NR_GPIO_IRQS                    (6 * 32)
+#define NR_GPIO_IRQS                    (7 * 32)
 #define NR_BOARD_IRQS                   64
 #define NR_IRQS                         (NR_GIC_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS)
 
diff --git a/drivers/gpio/gpio-rk30.c b/drivers/gpio/gpio-rk30.c
index b11d3f3ff7ba..386629aa67ba 100755
--- a/drivers/gpio/gpio-rk30.c
+++ b/drivers/gpio/gpio-rk30.c
@@ -89,7 +89,7 @@ static int rk30_gpiolib_request(struct gpio_chip *chip, unsigned offset);
 			.pull_updown      = rk30_gpiolib_pull_updown,	\
 			.dbg_show         = rk30_gpiolib_dbg_show,	\
 			.to_irq           = rk30_gpiolib_to_irq,	\
-			.base             = ID < 6 ? PIN_BASE + ID*NUM_GROUP : PIN_BASE + 5*NUM_GROUP,	\
+			.base             = PIN_BASE + ID*NUM_GROUP,	\
 			.ngpio            = ID < 6 ? NUM_GROUP : 16,	\
 		},							\
 		.id = ID, \
@@ -426,11 +426,10 @@ static struct irq_chip rk30_gpio_irq_chip = {
 
 void __init rk30_gpio_init(void)
 {
-	unsigned int i, j, pin;
+	unsigned int i, j, pin, irqs = 0;
 	struct rk30_gpio_bank *bank;
 
 	bank = rk30_gpio_banks;
-	pin = PIN_BASE;
 
 	for (i = 0; i < ARRAY_SIZE(rk30_gpio_banks); i++, bank++) {
 		spin_lock_init(&bank->lock);
@@ -439,6 +438,7 @@ void __init rk30_gpio_init(void)
 		gpiochip_add(&bank->chip);
 
 		__raw_writel(0, bank->regbase + GPIO_INTEN);
+		pin = bank->chip.base;
 		for (j = 0; j < 32; j++) {
 			unsigned int irq = gpio_to_irq(pin);
 			if (pin > MAX_PIN)
@@ -448,12 +448,13 @@ void __init rk30_gpio_init(void)
 			irq_set_chip_and_handler(irq, &rk30_gpio_irq_chip, handle_level_irq);
 			set_irq_flags(irq, IRQF_VALID);
 			pin++;
+			irqs++;
 		}
 
 		irq_set_handler_data(bank->irq, bank);
 		irq_set_chained_handler(bank->irq, rk30_gpio_irq_handler);
 	}
-	printk("%s: %d gpio irqs in %d banks\n", __func__, pin - PIN_BASE, ARRAY_SIZE(rk30_gpio_banks));
+	printk("%s: %d gpio irqs in %d banks\n", __func__, irqs, ARRAY_SIZE(rk30_gpio_banks));
 }
 
 #ifdef CONFIG_PM