From: Jim Grosbach Date: Sat, 21 Jan 2012 00:07:56 +0000 (+0000) Subject: Thumb2 'add rd, pc, imm' alternate form for 'adr' instruction. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=12a8863828879168ffd634df09f3aa91b0b256ee;p=oota-llvm.git Thumb2 'add rd, pc, imm' alternate form for 'adr' instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148601 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 142ab222b88..bbac56d0b5b 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -4180,3 +4180,6 @@ def : t2InstAlias<"ldrsb${p}.w $Rt, $addr", (t2LDRSBpcrel GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p)>; def : t2InstAlias<"ldrsh${p}.w $Rt, $addr", (t2LDRSHpcrel GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p)>; + +def : t2InstAlias<"add${p} $Rd, pc, $imm", + (t2ADR rGPR:$Rd, imm0_4095:$imm, pred:$p)>; diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 84814f16bc9..a520bfff6d3 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -4628,9 +4628,11 @@ bool ARMAsmParser::shouldOmitCCOutOperand(StringRef Mnemonic, // // If either register is a high reg, it's either one of the SP // variants (handled above) or a 32-bit encoding, so we just - // check against T3. + // check against T3. If the second register is the PC, this is an + // alternate form of ADR, which uses encoding T4, so check for that too. if ((!isARMLowRegister(static_cast(Operands[3])->getReg()) || !isARMLowRegister(static_cast(Operands[4])->getReg())) && + static_cast(Operands[4])->getReg() != ARM::PC && static_cast(Operands[5])->isT2SOImm()) return false; // If both registers are low, we're in an IT block, and the immediate is