From: Chris Lattner Date: Thu, 12 Jan 2006 07:38:04 +0000 (+0000) Subject: fix a bug in my previous checkin X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=138d322e966dc1f2641b35c73cb1d66379c4d20e;p=oota-llvm.git fix a bug in my previous checkin git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25244 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp index 7e017402a8e..cbe38feb996 100644 --- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp +++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp @@ -165,6 +165,7 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM) const char *SparcV8TargetLowering::getTargetNodeName(unsigned Opcode) const { switch (Opcode) { + default: return 0; case V8ISD::CMPICC: return "V8ISD::CMPICC"; case V8ISD::CMPFCC: return "V8ISD::CMPFCC"; case V8ISD::BRICC: return "V8ISD::BRICC"; @@ -661,7 +662,7 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) { std::vector Ops; Ops.push_back(LHS); Ops.push_back(RHS); - SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops); + SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1); return DAG.getNode(V8ISD::BRICC, MVT::Other, Chain, Dest, CC, Cond); } else { std::vector VTs; @@ -670,7 +671,7 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) { std::vector Ops; Ops.push_back(LHS); Ops.push_back(RHS); - SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops); + SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops).getValue(1); return DAG.getNode(V8ISD::BRFCC, MVT::Other, Chain, Dest, CC, Cond); } } diff --git a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp index 7e017402a8e..cbe38feb996 100644 --- a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp +++ b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp @@ -165,6 +165,7 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM) const char *SparcV8TargetLowering::getTargetNodeName(unsigned Opcode) const { switch (Opcode) { + default: return 0; case V8ISD::CMPICC: return "V8ISD::CMPICC"; case V8ISD::CMPFCC: return "V8ISD::CMPFCC"; case V8ISD::BRICC: return "V8ISD::BRICC"; @@ -661,7 +662,7 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) { std::vector Ops; Ops.push_back(LHS); Ops.push_back(RHS); - SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops); + SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1); return DAG.getNode(V8ISD::BRICC, MVT::Other, Chain, Dest, CC, Cond); } else { std::vector VTs; @@ -670,7 +671,7 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) { std::vector Ops; Ops.push_back(LHS); Ops.push_back(RHS); - SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops); + SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops).getValue(1); return DAG.getNode(V8ISD::BRFCC, MVT::Other, Chain, Dest, CC, Cond); } }