From: dkl <dkl@rock-chips.com>
Date: Thu, 3 Apr 2014 02:21:02 +0000 (+0800)
Subject: rk3288: temporarily not limit dclk_lcdc1 div to be even
X-Git-Tag: firefly_0821_release~5631
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=14d9c873ac4111f298fe0d4cc8b7da0060f37a8e;p=firefly-linux-kernel-4.4.55.git

rk3288: temporarily not limit dclk_lcdc1 div to be even
---

diff --git a/arch/arm/boot/dts/rk3288-clocks.dtsi b/arch/arm/boot/dts/rk3288-clocks.dtsi
index 986db63a99d4..befc71054243 100755
--- a/arch/arm/boot/dts/rk3288-clocks.dtsi
+++ b/arch/arm/boot/dts/rk3288-clocks.dtsi
@@ -1414,7 +1414,7 @@
 						rockchip,div-type = <CLK_DIVIDER_PLUS_ONE>;
 						#clock-cells = <0>;
 						rockchip,clkops-idx =
-							<CLKOPS_RATE_MUX_EVENDIV>;
+							<CLKOPS_RATE_MUX_DIV>;
 					};
 				};